diff options
Diffstat (limited to 'src/arch/x86/isa/operands.isa')
-rw-r--r-- | src/arch/x86/isa/operands.isa | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/x86/isa/operands.isa b/src/arch/x86/isa/operands.isa index 406c74a1f..eaedbdf17 100644 --- a/src/arch/x86/isa/operands.isa +++ b/src/arch/x86/isa/operands.isa @@ -96,13 +96,13 @@ def operand_types {{ }}; def operands {{ - 'DestReg': ('IntReg', 'uqw', 'dest', 'IsInteger', 1), - 'SrcReg1': ('IntReg', 'uqw', 'src1', 'IsInteger', 2), - 'SrcReg2': ('IntReg', 'uqw', 'src2', 'IsInteger', 3), - 'Base': ('IntReg', 'uqw', 'base', 'IsInteger', 4), - 'Index': ('IntReg', 'uqw', 'index', 'IsInteger', 5), - 'Data': ('IntReg', 'uqw', 'data', 'IsInteger', 6), - 'rax': ('IntReg', 'uqw', 'INTREG_RAX', 'IsInteger', 7), + 'SrcReg1': ('IntReg', 'uqw', '(((src1 & 0x1C) == 4 ? foldOBit : 0) | src1)', 'IsInteger', 1), + 'SrcReg2': ('IntReg', 'uqw', '(((src2 & 0x1C) == 4 ? foldOBit : 0) | src2)', 'IsInteger', 2), + 'Index': ('IntReg', 'uqw', '(((index & 0x1C) == 4 ? foldABit : 0) | index)', 'IsInteger', 3), + 'Base': ('IntReg', 'uqw', '(((base & 0x1C) == 4 ? foldABit : 0) | base)', 'IsInteger', 4), + 'DestReg': ('IntReg', 'uqw', '(((dest & 0x1C) == 4 ? foldOBit : 0) | dest)', 'IsInteger', 5), + 'Data': ('IntReg', 'uqw', '(((data & 0x1C) == 4 ? foldOBit : 0) | data)', 'IsInteger', 6), + 'rax': ('IntReg', 'uqw', '(INTREG_RAX)', 'IsInteger', 7), 'RIP': ('NPC', 'uqw', None, (None, None, 'IsControl'), 10), 'ccFlagBits': ('IntReg', 'uqw', 'NUM_INTREGS + NumMicroIntRegs', None, 20), 'Mem': ('Mem', 'uqw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 100) |