diff options
Diffstat (limited to 'src/arch/x86/isa')
11 files changed, 54 insertions, 51 deletions
diff --git a/src/arch/x86/isa/formats/string.isa b/src/arch/x86/isa/formats/string.isa index 20de5952e..84048c8ec 100644 --- a/src/arch/x86/isa/formats/string.isa +++ b/src/arch/x86/isa/formats/string.isa @@ -86,7 +86,7 @@ def format StringInst(*opTypeSet) {{ } else if (LEGACY_REPNE) { // The repne prefix is illegal return new MicroFault(machInst, "illprefix", 0, - new InvalidOpcode, 0); + std::make_shared<InvalidOpcode>(), 0); } else { %s } diff --git a/src/arch/x86/isa/formats/unknown.isa b/src/arch/x86/isa/formats/unknown.isa index 5911d5c00..585ff1ed5 100644 --- a/src/arch/x86/isa/formats/unknown.isa +++ b/src/arch/x86/isa/formats/unknown.isa @@ -77,7 +77,7 @@ output exec {{ Fault Unknown::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { - return new InvalidOpcode(); + return std::make_shared<InvalidOpcode>(); } }}; diff --git a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py index 90ad5d4dd..838504284 100644 --- a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py +++ b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py @@ -40,12 +40,12 @@ def macroop BOUND_R_M { ld t1, seg, sib, disp, dataSize="env.dataSize * 2" srli t2, t1, "env.dataSize * 8" sub t1, t1, reg, flags=(ECF,) - fault "new BoundRange", flags=(CECF,) + fault "std::make_shared<BoundRange>()", flags=(CECF,) sub t2, reg, t2, flags=(ECF,) - fault "new BoundRange", flags=(CECF,) + fault "std::make_shared<BoundRange>()", flags=(CECF,) }; def macroop BOUND_R_P { - fault "new UnimpInstFault" + fault "std::make_shared<UnimpInstFault>()" }; ''' diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py index d50e40e61..70cbd1075 100644 --- a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py +++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py @@ -128,7 +128,7 @@ processCSDescriptor: # if temp_RIP > CS.limit throw #GP(0) rdlimit t6, cs, dataSize=8 sub t0, t1, t6, flags=(ECF,) - fault "new GeneralProtection(0)", flags=(CECF,) + fault "std::make_shared<GeneralProtection>(0)", flags=(CECF,) #(temp_CPL!=CPL) srli t7, t4, 4 @@ -146,7 +146,7 @@ doPopStackStuffAndCheckRIP: # if t7 isn't 0 or -1, it wasn't canonical. br label("doPopStackStuff"), flags=(CEZF,) addi t0, t7, 1, flags=(EZF,), dataSize=ssz - fault "new GeneralProtection(0)", flags=(nCEZF,) + fault "std::make_shared<GeneralProtection>(0)", flags=(nCEZF,) doPopStackStuff: # POP.v temp_RSP diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py index 420655165..74cfcfccd 100644 --- a/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py +++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py @@ -115,7 +115,7 @@ def rom # t1 has the offset and t2 has the new selector. # This is intended to run in protected mode. andi t0, t2, 0xFC, flags=(EZF,), dataSize=2 - fault "new GeneralProtection(0)", flags=(CEZF,) + fault "std::make_shared<GeneralProtection>(0)", flags=(CEZF,) andi t3, t2, 0xF8, dataSize=8 andi t0, t2, 0x4, flags=(EZF,), dataSize=2 br rom_local_label("farJmpGlobalDescriptor"), flags=(CEZF,) diff --git a/src/arch/x86/isa/insts/system/undefined_operation.py b/src/arch/x86/isa/insts/system/undefined_operation.py index f6ecbbffc..4ea827683 100644 --- a/src/arch/x86/isa/insts/system/undefined_operation.py +++ b/src/arch/x86/isa/insts/system/undefined_operation.py @@ -38,6 +38,6 @@ microcode = ''' def macroop UD2 { - fault "new InvalidOpcode()" + fault "std::make_shared<InvalidOpcode>()" }; ''' diff --git a/src/arch/x86/isa/insts/x87/arithmetic/addition.py b/src/arch/x86/isa/insts/x87/arithmetic/addition.py index a7e427c62..2538283f0 100644 --- a/src/arch/x86/isa/insts/x87/arithmetic/addition.py +++ b/src/arch/x86/isa/insts/x87/arithmetic/addition.py @@ -85,12 +85,12 @@ def macroop FADDP_R def macroop FADDP_M { - fault "new UnimpInstFault" + fault "std::make_shared<UnimpInstFault>()" }; def macroop FADDP_P { - fault "new UnimpInstFault" + fault "std::make_shared<UnimpInstFault>()" }; # FIADD diff --git a/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py b/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py index 77db1e470..227575744 100644 --- a/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py +++ b/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py @@ -85,12 +85,12 @@ def macroop FSUBP_R def macroop FSUBP_M { - fault "new UnimpInstFault" + fault "std::make_shared<UnimpInstFault>()" }; def macroop FSUBP_P { - fault "new UnimpInstFault" + fault "std::make_shared<UnimpInstFault>()" }; # FISUB diff --git a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py index b6fbb01cc..ca608e3e4 100644 --- a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py +++ b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py @@ -45,11 +45,11 @@ def macroop FXCH_R def macroop FXCH_M { - fault "new UnimpInstFault" + fault "std::make_shared<UnimpInstFault>()" }; def macroop FXCH_P { - fault "new UnimpInstFault" + fault "std::make_shared<UnimpInstFault>()" }; ''' diff --git a/src/arch/x86/isa/microops/debug.isa b/src/arch/x86/isa/microops/debug.isa index 650c8a5a3..b14202ac5 100644 --- a/src/arch/x86/isa/microops/debug.isa +++ b/src/arch/x86/isa/microops/debug.isa @@ -90,7 +90,8 @@ def template MicroDebugExecute {{ %(op_decl)s %(op_rd)s if (%(cond_test)s) { - return new GenericISA::M5DebugFault(func, message); + return std::make_shared<GenericISA::M5DebugFault>(func, + message); } else { return NoFault; } diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index 759bffc3c..7d0374f02 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -629,7 +629,7 @@ let {{ uint64_t dividend = remainder; //Do the division. if (divisor == 0) { - fault = new DivideByZero; + fault = std::make_shared<DivideByZero>(); } else { divide(dividend, divisor, quotient, remainder); //Record the final results. @@ -652,7 +652,7 @@ let {{ //If we overshot, do nothing. This lets us unrool division loops a //little. if (divisor == 0) { - fault = new DivideByZero; + fault = std::make_shared<DivideByZero>(); } else if (remaining) { if (divisor & (ULL(1) << 63)) { while (remaining && !(dividend & (ULL(1) << 63))) { @@ -1303,9 +1303,9 @@ let {{ CR4 cr4 = CR4Op; DR7 dr7 = DR7Op; if ((cr4.de == 1 && (src1 == 4 || src1 == 5)) || src1 >= 8) { - fault = new InvalidOpcode(); + fault = std::make_shared<InvalidOpcode>(); } else if (dr7.gd) { - fault = new DebugException(); + fault = std::make_shared<DebugException>(); } else { %s } @@ -1321,12 +1321,12 @@ let {{ CR4 cr4 = CR4Op; DR7 dr7 = DR7Op; if ((cr4.de == 1 && (dest == 4 || dest == 5)) || dest >= 8) { - fault = new InvalidOpcode(); + fault = std::make_shared<InvalidOpcode>(); } else if ((dest == 6 || dest == 7) && bits(psrc1, 63, 32) && machInst.mode.mode == LongMode) { - fault = new GeneralProtection(0); + fault = std::make_shared<GeneralProtection>(0); } else if (dr7.gd) { - fault = new DebugException(); + fault = std::make_shared<DebugException>(); } else { DebugDest = psrc1; } @@ -1338,7 +1338,7 @@ let {{ src1, "InstRegIndex(NUM_INTREGS)", flags, dataSize) rdcrCode = ''' if (src1 == 1 || (src1 > 4 && src1 < 8) || (src1 > 8)) { - fault = new InvalidOpcode(); + fault = std::make_shared<InvalidOpcode>(); } else { %s } @@ -1352,7 +1352,7 @@ let {{ src1, "InstRegIndex(NUM_INTREGS)", flags, dataSize) code = ''' if (dest == 1 || (dest > 4 && dest < 8) || (dest > 8)) { - fault = new InvalidOpcode(); + fault = std::make_shared<InvalidOpcode>(); } else { // There are *s in the line below so it doesn't confuse the // parser. They may be unnecessary. @@ -1370,7 +1370,7 @@ let {{ (!cr0.pe && cr0.pg) || (!cr0.cd && cr0.nw) || (cr0.pg && efer.lme && !oldCr4.pae)) - fault = new GeneralProtection(0); + fault = std::make_shared<GeneralProtection>(0); } break; case 2: @@ -1383,16 +1383,16 @@ let {{ // PAE can't be disabled in long mode. if (bits(newVal, 63, 11) || (machInst.mode.mode == LongMode && !cr4.pae)) - fault = new GeneralProtection(0); + fault = std::make_shared<GeneralProtection>(0); } break; case 8: { if (bits(newVal, 63, 4)) - fault = new GeneralProtection(0); + fault = std::make_shared<GeneralProtection>(0); } default: - fault = new GenericISA::M5PanicFault( + fault = std::make_shared<GenericISA::M5PanicFault>( "Unrecognized control register %d.\\n", dest); } ControlDest = newVal; @@ -1476,19 +1476,20 @@ let {{ case SegCSCheck: // Make sure it's the right type if (desc.s == 0 || desc.type.codeOrData != 1) { - fault = new GeneralProtection(0); + fault = std::make_shared<GeneralProtection>(0); } else if (m5reg.cpl != desc.dpl) { - fault = new GeneralProtection(0); + fault = std::make_shared<GeneralProtection>(0); } break; case SegCallGateCheck: - fault = new GenericISA::M5PanicFault("CS checks for far " + fault = std::make_shared<GenericISA::M5PanicFault>( + "CS checks for far " "calls/jumps through call gates not implemented.\\n"); break; case SegSoftIntGateCheck: // Check permissions. if (desc.dpl < m5reg.cpl) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); break; } // Fall through on purpose @@ -1496,22 +1497,22 @@ let {{ // Make sure the gate's the right type. if ((m5reg.mode == LongMode && (desc.type & 0xe) != 0xe) || ((desc.type & 0x6) != 0x6)) { - fault = new GeneralProtection(0); + fault = std::make_shared<GeneralProtection>(0); } break; case SegSSCheck: if (selector.si || selector.ti) { if (!desc.p) { - fault = new StackFault(selector); + fault = std::make_shared<StackFault>(selector); } else if (!(desc.s == 1 && desc.type.codeOrData == 0 && desc.type.w) || (desc.dpl != m5reg.cpl) || (selector.rpl != m5reg.cpl)) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } } else if (m5reg.submode != SixtyFourBitMode || m5reg.cpl == 3) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } break; case SegIretCheck: @@ -1521,50 +1522,51 @@ let {{ !(desc.s == 1 && desc.type.codeOrData == 1) || (!desc.type.c && desc.dpl != selector.rpl) || (desc.type.c && desc.dpl > selector.rpl)) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } else if (!desc.p) { - fault = new SegmentNotPresent(selector); + fault = std::make_shared<SegmentNotPresent>(selector); } break; } case SegIntCSCheck: if (m5reg.mode == LongMode) { if (desc.l != 1 || desc.d != 0) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } } else { - fault = new GenericISA::M5PanicFault("Interrupt CS " + fault = std::make_shared<GenericISA::M5PanicFault>( + "Interrupt CS " "checks not implemented in legacy mode.\\n"); } break; case SegTRCheck: if (!selector.si || selector.ti) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } break; case SegTSSCheck: if (!desc.p) { - fault = new SegmentNotPresent(selector); + fault = std::make_shared<SegmentNotPresent>(selector); } else if (!(desc.type == 0x9 || (desc.type == 1 && m5reg.mode != LongMode))) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } break; case SegInGDTCheck: if (selector.ti) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } break; case SegLDTCheck: if (!desc.p) { - fault = new SegmentNotPresent(selector); + fault = std::make_shared<SegmentNotPresent>(selector); } else if (desc.type != 0x2) { - fault = new GeneralProtection(selector); + fault = std::make_shared<GeneralProtection>(selector); } break; default: - fault = new GenericISA::M5PanicFault( + fault = std::make_shared<GenericISA::M5PanicFault>( "Undefined segment check type.\\n"); } ''' @@ -1598,7 +1600,7 @@ let {{ replaceBits(target, 31, 16, bits(desc, 63, 48)); break; default: - fault = new GenericISA::M5PanicFault( + fault = std::make_shared<GenericISA::M5PanicFault>( "Wrdh used with wrong descriptor type!\\n"); } DestReg = target; @@ -1629,7 +1631,7 @@ let {{ while (true) { if (selector.si || selector.ti) { if (!desc.p) { - fault = new GenericISA::M5PanicFault( + fault = std::make_shared<GenericISA::M5PanicFault>( "Segment not present.\\n"); break; } @@ -1646,7 +1648,7 @@ let {{ if (!desc.s) { // The expand down bit happens to be set for gates. if (desc.type.e) { - fault = new GenericISA::M5PanicFault( + fault = std::make_shared<GenericISA::M5PanicFault>( "Gate descriptor encountered.\\n"); break; } |