diff options
Diffstat (limited to 'src/arch/x86/isa')
15 files changed, 118 insertions, 115 deletions
diff --git a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py index 083d8775d..e4c90b8d9 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py @@ -55,33 +55,33 @@ microcode = ''' def macroop ADDSS_XMM_XMM { - maddf xmml, xmml, xmmlm, size=4, ext=1 + maddf xmml, xmml, xmmlm, size=4, ext=Scalar }; def macroop ADDSS_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - maddf xmml, xmml, ufp1, size=4, ext=1 + maddf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop ADDSS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - maddf xmml, xmml, ufp1, size=4, ext=1 + maddf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop ADDSD_XMM_XMM { - maddf xmml, xmml, xmmlm, size=8, ext=1 + maddf xmml, xmml, xmmlm, size=8, ext=Scalar }; def macroop ADDSD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - maddf xmml, xmml, ufp1, size=8, ext=1 + maddf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop ADDSD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - maddf xmml, xmml, ufp1, size=8, ext=1 + maddf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop ADDPS_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py index 3e565278c..e8f596463 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py @@ -55,33 +55,33 @@ microcode = ''' def macroop DIVSS_XMM_XMM { - mdivf xmml, xmml, xmmlm, size=4, ext=1 + mdivf xmml, xmml, xmmlm, size=4, ext=Scalar }; def macroop DIVSS_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mdivf xmml, xmml, ufp1, size=4, ext=1 + mdivf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop DIVSS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mdivf xmml, xmml, ufp1, size=4, ext=1 + mdivf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop DIVSD_XMM_XMM { - mdivf xmml, xmml, xmmlm, size=8, ext=1 + mdivf xmml, xmml, xmmlm, size=8, ext=Scalar }; def macroop DIVSD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mdivf xmml, xmml, ufp1, size=8, ext=1 + mdivf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop DIVSD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mdivf xmml, xmml, ufp1, size=8, ext=1 + mdivf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop DIVPS_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py index adf7650b9..41c5f719c 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py @@ -57,23 +57,23 @@ microcode = ''' # HADDPS def macroop HADDPD_XMM_XMM { - maddf ufp1, xmmh , xmml, size=8, ext=1 - maddf xmmh, xmmlm, xmmhm, size=8, ext=1 + maddf ufp1, xmmh , xmml, size=8, ext=Scalar + maddf xmmh, xmmlm, xmmhm, size=8, ext=Scalar movfp xmml, ufp1 }; def macroop HADDPD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT+8", dataSize=8 - maddf xmml, xmmh, xmml, size=8, ext=1 - maddf xmmh, ufp1, ufp2, size=8, ext=1 + maddf xmml, xmmh, xmml, size=8, ext=Scalar + maddf xmmh, ufp1, ufp2, size=8, ext=Scalar }; def macroop HADDPD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT+8", dataSize=8 - maddf xmml, xmmh, xmml, size=8, ext=1 - maddf xmmh, ufp1, ufp2, size=8, ext=1 + maddf xmml, xmmh, xmml, size=8, ext=Scalar + maddf xmmh, ufp1, ufp2, size=8, ext=Scalar }; ''' diff --git a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py index fc28fbda4..c00aa6048 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py @@ -55,33 +55,33 @@ microcode = ''' def macroop MULSS_XMM_XMM { - mmulf xmml, xmml, xmmlm, size=4, ext=1 + mmulf xmml, xmml, xmmlm, size=4, ext=Scalar }; def macroop MULSS_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmulf xmml, xmml, ufp1, size=4, ext=1 + mmulf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop MULSS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmulf xmml, xmml, ufp1, size=4, ext=1 + mmulf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop MULSD_XMM_XMM { - mmulf xmml, xmml, xmmlm, size=8, ext=1 + mmulf xmml, xmml, xmmlm, size=8, ext=Scalar }; def macroop MULSD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmulf xmml, xmml, ufp1, size=8, ext=1 + mmulf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop MULSD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmulf xmml, xmml, ufp1, size=8, ext=1 + mmulf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop MULPS_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py index fdeb30ddc..dc52a63c3 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py @@ -55,18 +55,18 @@ microcode = ''' def macroop SQRTSS_XMM_XMM { - msqrt xmml, xmmlm, size=4, ext=1 + msqrt xmml, xmmlm, size=4, ext=Scalar }; def macroop SQRTSS_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - msqrt xmml, ufp1, size=4, ext=1 + msqrt xmml, ufp1, size=4, ext=Scalar }; def macroop SQRTSS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - msqrt xmml, ufp1, size=4, ext=1 + msqrt xmml, ufp1, size=4, ext=Scalar }; def macroop SQRTPS_XMM_XMM { @@ -90,18 +90,18 @@ def macroop SQRTPS_XMM_P { }; def macroop SQRTSD_XMM_XMM { - msqrt xmml, xmmlm, size=8, ext=1 + msqrt xmml, xmmlm, size=8, ext=Scalar }; def macroop SQRTSD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - msqrt xmml, ufp1, size=8, ext=1 + msqrt xmml, ufp1, size=8, ext=Scalar }; def macroop SQRTSD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - msqrt xmml, ufp1, size=8, ext=1 + msqrt xmml, ufp1, size=8, ext=Scalar }; def macroop SQRTPD_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py index 378abc070..d69ce3831 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py @@ -55,33 +55,33 @@ microcode = ''' def macroop SUBSS_XMM_XMM { - msubf xmml, xmml, xmmlm, size=4, ext=1 + msubf xmml, xmml, xmmlm, size=4, ext=Scalar }; def macroop SUBSS_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - msubf xmml, xmml, ufp1, size=4, ext=1 + msubf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop SUBSS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - msubf xmml, xmml, ufp1, size=4, ext=1 + msubf xmml, xmml, ufp1, size=4, ext=Scalar }; def macroop SUBSD_XMM_XMM { - msubf xmml, xmml, xmmlm, size=8, ext=1 + msubf xmml, xmml, xmmlm, size=8, ext=Scalar }; def macroop SUBSD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - msubf xmml, xmml, ufp1, size=8, ext=1 + msubf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop SUBSD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - msubf xmml, xmml, ufp1, size=8, ext=1 + msubf xmml, xmml, ufp1, size=8, ext=Scalar }; def macroop SUBPS_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py b/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py index 09c34600b..e4449be10 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py @@ -95,32 +95,32 @@ def macroop CMPPD_XMM_P_I { }; def macroop CMPSS_XMM_XMM_I { - mcmpf2r xmml, xmml, xmmlm, size=4, ext="IMMEDIATE | 0x8" + mcmpf2r xmml, xmml, xmmlm, size=4, ext="IMMEDIATE |" + Scalar }; def macroop CMPSS_XMM_M_I { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 - mcmpf2r xmml, xmml, ufp1, size=4, ext="IMMEDIATE | 0x8" + mcmpf2r xmml, xmml, ufp1, size=4, ext="IMMEDIATE |" + Scalar }; def macroop CMPSS_XMM_P_I { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 - mcmpf2r xmml, xmml, ufp1, size=4, ext="IMMEDIATE | 0x8" + mcmpf2r xmml, xmml, ufp1, size=4, ext="IMMEDIATE |" + Scalar }; def macroop CMPSD_XMM_XMM_I { - mcmpf2r xmml, xmml, xmmlm, size=8, ext="IMMEDIATE | 0x8" + mcmpf2r xmml, xmml, xmmlm, size=8, ext="IMMEDIATE |" + Scalar }; def macroop CMPSD_XMM_M_I { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 - mcmpf2r xmml, xmml, ufp1, size=8, ext="IMMEDIATE | 0x8" + mcmpf2r xmml, xmml, ufp1, size=8, ext="IMMEDIATE |" + Scalar }; def macroop CMPSD_XMM_P_I { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 - mcmpf2r xmml, xmml, ufp1, size=8, ext="IMMEDIATE | 0x8" + mcmpf2r xmml, xmml, ufp1, size=8, ext="IMMEDIATE |" + Scalar }; ''' diff --git a/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py b/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py index 17c97662c..0a62ce343 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py @@ -95,33 +95,33 @@ def macroop MINPD_XMM_P { }; def macroop MINSS_XMM_XMM { - mminf xmml, xmml, xmmlm, ext=1, size=4 + mminf xmml, xmml, xmmlm, ext=Scalar, size=4 }; def macroop MINSS_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 - mminf xmml, xmml, ufp1, ext=1, size=4 + mminf xmml, xmml, ufp1, ext=Scalar, size=4 }; def macroop MINSS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 - mminf xmml, xmml, ufp1, ext=1, size=4 + mminf xmml, xmml, ufp1, ext=Scalar, size=4 }; def macroop MINSD_XMM_XMM { - mminf xmml, xmml, xmmlm, ext=1, size=8 + mminf xmml, xmml, xmmlm, ext=Scalar, size=8 }; def macroop MINSD_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 - mminf xmml, xmml, ufp1, ext=1, size=8 + mminf xmml, xmml, ufp1, ext=Scalar, size=8 }; def macroop MINSD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 - mminf xmml, xmml, ufp1, ext=1, size=8 + mminf xmml, xmml, ufp1, ext=Scalar, size=8 }; def macroop MAXPS_XMM_XMM { @@ -165,32 +165,32 @@ def macroop MAXPD_XMM_P { }; def macroop MAXSS_XMM_XMM { - mmaxf xmml, xmml, xmmlm, ext=1, size=4 + mmaxf xmml, xmml, xmmlm, ext=Scalar, size=4 }; def macroop MAXSS_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 - mmaxf xmml, xmml, ufp1, ext=1, size=4 + mmaxf xmml, xmml, ufp1, ext=Scalar, size=4 }; def macroop MAXSS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 - mmaxf xmml, xmml, ufp1, ext=1, size=4 + mmaxf xmml, xmml, ufp1, ext=Scalar, size=4 }; def macroop MAXSD_XMM_XMM { - mmaxf xmml, xmml, xmmlm, ext=1, size=8 + mmaxf xmml, xmml, xmmlm, ext=Scalar, size=8 }; def macroop MAXSD_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 - mmaxf xmml, xmml, ufp1, ext=1, size=8 + mmaxf xmml, xmml, ufp1, ext=Scalar, size=8 }; def macroop MAXSD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 - mmaxf xmml, xmml, ufp1, ext=1, size=8 + mmaxf xmml, xmml, ufp1, ext=Scalar, size=8 }; ''' diff --git a/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py b/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py index 1c36f7e45..5988c77ba 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py @@ -55,33 +55,33 @@ microcode = ''' def macroop CVTSS2SD_XMM_XMM { - cvtf2f xmml, xmmlm, destSize=8, srcSize=4, ext=1 + cvtf2f xmml, xmmlm, destSize=8, srcSize=4, ext=Scalar }; def macroop CVTSS2SD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvtf2f xmml, ufp1, destSize=8, srcSize=4, ext=1 + cvtf2f xmml, ufp1, destSize=8, srcSize=4, ext=Scalar }; def macroop CVTSS2SD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvtf2f xmml, ufp1, destSize=8, srcSize=4, ext=1 + cvtf2f xmml, ufp1, destSize=8, srcSize=4, ext=Scalar }; def macroop CVTSD2SS_XMM_XMM { - cvtf2f xmml, xmmlm, destSize=4, srcSize=8, ext=1 + cvtf2f xmml, xmmlm, destSize=4, srcSize=8, ext=Scalar }; def macroop CVTSD2SS_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvtf2f xmml, ufp1, destSize=4, srcSize=8, ext=1 + cvtf2f xmml, ufp1, destSize=4, srcSize=8, ext=Scalar }; def macroop CVTSD2SS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvtf2f xmml, ufp1, destSize=4, srcSize=8, ext=1 + cvtf2f xmml, ufp1, destSize=4, srcSize=8, ext=Scalar }; def macroop CVTPS2PD_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py b/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py index 16abd96f4..0b7ca5c5b 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py @@ -55,74 +55,74 @@ microcode = ''' def macroop CVTSS2SI_R_XMM { - cvtf2i ufp1, xmmlm, srcSize=4, destSize=dsz, ext=(1 | 4) + cvtf2i ufp1, xmmlm, srcSize=4, destSize=dsz, ext = Scalar + "| 4" mov2int reg, ufp1, size=dsz }; def macroop CVTSS2SI_R_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext=(1 | 4) + cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext = Scalar + "| 4" mov2int reg, ufp1, size=dsz }; def macroop CVTSS2SI_R_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext=(1 | 4) + cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext = Scalar + "| 4" mov2int reg, ufp1, size=dsz }; def macroop CVTSD2SI_R_XMM { - cvtf2i ufp1, xmmlm, srcSize=8, destSize=dsz, ext=(1 | 4) + cvtf2i ufp1, xmmlm, srcSize=8, destSize=dsz, ext = Scalar + "| 4" mov2int reg, ufp1, size=dsz }; def macroop CVTSD2SI_R_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext=(1 | 4) + cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext = Scalar + "| 4" mov2int reg, ufp1, size=dsz }; def macroop CVTSD2SI_R_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext=(1 | 4) + cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext = Scalar + "| 4" mov2int reg, ufp1, size=dsz }; def macroop CVTTSS2SI_R_XMM { - cvtf2i ufp1, xmmlm, srcSize=4, destSize=dsz, ext=1 + cvtf2i ufp1, xmmlm, srcSize=4, destSize=dsz, ext=Scalar mov2int reg, ufp1, size=dsz }; def macroop CVTTSS2SI_R_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext=1 + cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext=Scalar mov2int reg, ufp1, size=dsz }; def macroop CVTTSS2SI_R_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext=1 + cvtf2i ufp1, ufp1, srcSize=4, destSize=dsz, ext=Scalar mov2int reg, ufp1, size=dsz }; def macroop CVTTSD2SI_R_XMM { - cvtf2i ufp1, xmmlm, srcSize=8, destSize=dsz, ext=1 + cvtf2i ufp1, xmmlm, srcSize=8, destSize=dsz, ext=Scalar mov2int reg, ufp1, size=dsz }; def macroop CVTTSD2SI_R_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext=1 + cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext=Scalar mov2int reg, ufp1, size=dsz }; def macroop CVTTSD2SI_R_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext=1 + cvtf2i ufp1, ufp1, srcSize=8, destSize=dsz, ext=Scalar mov2int reg, ufp1, size=dsz }; ''' diff --git a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py index a5d90c6b2..274ee4287 100644 --- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py +++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py @@ -115,22 +115,22 @@ def macroop PMULHUW_XMM_P { }; def macroop PMULUDQ_XMM_XMM { - mmuli xmml, xmml, xmmlm, srcSize=4, destSize=8, ext=1 - mmuli xmmh, xmmh, xmmhm, srcSize=4, destSize=8, ext=1 + mmuli xmml, xmml, xmmlm, srcSize=4, destSize=8, ext=Scalar + mmuli xmmh, xmmh, xmmhm, srcSize=4, destSize=8, ext=Scalar }; def macroop PMULUDQ_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - mmuli xmml, xmml, ufp1, srcSize=4, destSize=8, ext=1 - mmuli xmmh, xmmh, ufp2, srcSize=4, destSize=8, ext=1 + mmuli xmml, xmml, ufp1, srcSize=4, destSize=8, ext=Scalar + mmuli xmmh, xmmh, ufp2, srcSize=4, destSize=8, ext=Scalar }; def macroop PMULUDQ_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - mmuli xmml, xmml, ufp1, srcSize=4, destSize=8, ext=1 - mmuli xmmh, xmmh, ufp2, srcSize=4, destSize=8, ext=1 + mmuli xmml, xmml, ufp1, srcSize=4, destSize=8, ext=Scalar + mmuli xmmh, xmmh, ufp2, srcSize=4, destSize=8, ext=Scalar }; ''' diff --git a/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py b/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py index 8d632a0ac..080be66f6 100644 --- a/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py +++ b/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py @@ -56,33 +56,33 @@ microcode = ''' def macroop CVTSI2SS_XMM_R { mov2fp ufp1, regm, destSize=dsz, srcSize=dsz - cvti2f xmml, ufp1, srcSize=dsz, destSize=4, ext=1 + cvti2f xmml, ufp1, srcSize=dsz, destSize=4, ext=Scalar }; def macroop CVTSI2SS_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvti2f xmml, ufp1, srcSize=dsz, destSize=4, ext=1 + cvti2f xmml, ufp1, srcSize=dsz, destSize=4, ext=Scalar }; def macroop CVTSI2SS_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvti2f xmml, ufp1, srcSize=dsz, destSize=4, ext=1 + cvti2f xmml, ufp1, srcSize=dsz, destSize=4, ext=Scalar }; def macroop CVTSI2SD_XMM_R { mov2fp ufp1, regm, destSize=dsz, srcSize=dsz - cvti2f xmml, ufp1, srcSize=dsz, destSize=8, ext=1 + cvti2f xmml, ufp1, srcSize=dsz, destSize=8, ext=Scalar }; def macroop CVTSI2SD_XMM_M { ldfp ufp1, seg, sib, disp, dataSize=8 - cvti2f xmml, ufp1, srcSize=dsz, destSize=8, ext=1 + cvti2f xmml, ufp1, srcSize=dsz, destSize=8, ext=Scalar }; def macroop CVTSI2SD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - cvti2f xmml, ufp1, srcSize=dsz, destSize=8, ext=1 + cvti2f xmml, ufp1, srcSize=dsz, destSize=8, ext=Scalar }; ''' diff --git a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py index 7383a744f..d116d04b3 100644 --- a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py +++ b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py @@ -115,17 +115,17 @@ def macroop PMULHUW_MMX_P { }; def macroop PMULUDQ_MMX_MMX { - mmuli mmx, mmx, mmxm, srcSize=4, destSize=8, ext=1 + mmuli mmx, mmx, mmxm, srcSize=4, destSize=8, ext=Scalar }; def macroop PMULUDQ_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmuli mmx, mmx, ufp1, srcSize=4, destSize=8, ext=1 + mmuli mmx, mmx, ufp1, srcSize=4, destSize=8, ext=Scalar }; def macroop PMULUDQ_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmuli mmx, mmx, ufp1, srcSize=4, destSize=8, ext=1 + mmuli mmx, mmx, ufp1, srcSize=4, destSize=8, ext=Scalar }; ''' diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index 25b58dfb7..23e2f74ca 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -181,6 +181,9 @@ let {{ 'kernel_gs_base'): assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper()) + for flag in ('Scalar',): + assembler.symbols[flag] = 'Media%sOp' % flag + # Code literal which forces a default 64 bit operand size in 64 bit mode. assembler.symbols["oszIn64Override"] = ''' if (machInst.mode.submode == SixtyFourBitMode && diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa index 4052f254d..0a45e38fb 100644 --- a/src/arch/x86/isa/microops/mediaop.isa +++ b/src/arch/x86/isa/microops/mediaop.isa @@ -352,7 +352,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -545,7 +545,7 @@ let {{ int size = srcSize; int sizeBits = size * 8; assert(srcSize == 4 || srcSize == 8); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -595,7 +595,7 @@ let {{ int size = srcSize; int sizeBits = size * 8; assert(srcSize == 4 || srcSize == 8); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -634,7 +634,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -672,7 +672,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -725,7 +725,7 @@ let {{ int size = srcSize; int sizeBits = size * 8; assert(srcSize == 4 || srcSize == 8); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -766,7 +766,7 @@ let {{ int size = srcSize; int sizeBits = size * 8; assert(srcSize == 4 || srcSize == 8); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -812,7 +812,7 @@ let {{ int size = srcSize; int sizeBits = size * 8; assert(srcSize == 4 || srcSize == 8); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -858,7 +858,7 @@ let {{ int size = srcSize; int sizeBits = size * 8; assert(srcSize == 4 || srcSize == 8); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -904,7 +904,7 @@ let {{ int size = srcSize; int sizeBits = size * 8; assert(srcSize == 4 || srcSize == 8); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -938,7 +938,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -973,7 +973,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -1013,7 +1013,7 @@ let {{ int destBits = destSize * 8; assert(destBits <= 64); assert(destSize >= srcSize); - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / destSize); + int items = numItems(destSize); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -1058,7 +1058,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -1098,7 +1098,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t shiftAmt = op2.uqw; uint64_t result = FpDestReg.uqw; @@ -1125,7 +1125,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t shiftAmt = op2.uqw; uint64_t result = FpDestReg.uqw; @@ -1156,7 +1156,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t shiftAmt = op2.uqw; uint64_t result = FpDestReg.uqw; @@ -1201,15 +1201,15 @@ let {{ int srcStart = 0; int destStart = 0; if (srcSize == 2 * destSize) { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / srcSize; + items = numItems(srcSize); if (ext & 0x2) destStart = destSizeBits * items; } else if (destSize == 2 * srcSize) { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / destSize; + items = numItems(destSize); if (ext & 0x2) srcStart = srcSizeBits * items; } else { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / destSize; + items = numItems(destSize); } uint64_t result = FpDestReg.uqw; @@ -1273,15 +1273,15 @@ let {{ int srcStart = 0; int destStart = 0; if (srcSize == 2 * destSize) { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / srcSize; + items = numItems(srcSize); if (ext & 0x2) destStart = destSizeBits * items; } else if (destSize == 2 * srcSize) { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / destSize; + items = numItems(destSize); if (ext & 0x2) srcStart = srcSizeBits * items; } else { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / destSize; + items = numItems(destSize); } uint64_t result = FpDestReg.uqw; @@ -1334,15 +1334,15 @@ let {{ int srcStart = 0; int destStart = 0; if (srcSize == 2 * destSize) { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / srcSize; + items = numItems(srcSize); if (ext & 0x2) destStart = destSizeBits * items; } else if (destSize == 2 * srcSize) { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / destSize; + items = numItems(destSize); if (ext & 0x2) srcStart = srcSizeBits * items; } else { - items = (ext & 0x1) ? 1: sizeof(FloatRegBits) / destSize; + items = numItems(destSize); } uint64_t result = FpDestReg.uqw; @@ -1393,7 +1393,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { @@ -1432,7 +1432,7 @@ let {{ assert(srcSize == destSize); int size = srcSize; int sizeBits = size * 8; - int items = (ext & 0x8) ? 1: (sizeof(FloatRegBits) / size); + int items = numItems(size); uint64_t result = FpDestReg.uqw; for (int i = 0; i < items; i++) { |