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Diffstat (limited to 'src/arch/x86/predecoder.hh')
-rw-r--r--src/arch/x86/predecoder.hh36
1 files changed, 24 insertions, 12 deletions
diff --git a/src/arch/x86/predecoder.hh b/src/arch/x86/predecoder.hh
index 6562ab9f5..3c858f061 100644
--- a/src/arch/x86/predecoder.hh
+++ b/src/arch/x86/predecoder.hh
@@ -60,6 +60,8 @@
#include "arch/x86/types.hh"
#include "base/bitfield.hh"
+#include "base/misc.hh"
+#include "base/trace.hh"
#include "sim/host.hh"
class ThreadContext;
@@ -81,6 +83,8 @@ namespace X86ISA
MachInst fetchChunk;
//The pc of the start of fetchChunk
Addr basePC;
+ //The pc the current instruction started at
+ Addr origPC;
//The offset into fetchChunk of current processing
int offset;
//The extended machine instruction being generated
@@ -130,6 +134,8 @@ namespace X86ISA
outOfBytes = true;
}
+ void reset();
+
//State machine state
protected:
//Whether or not we're out of bytes
@@ -144,6 +150,7 @@ namespace X86ISA
int immediateCollected;
enum State {
+ ResetState,
PrefixState,
OpcodeState,
ModRMState,
@@ -166,10 +173,13 @@ namespace X86ISA
public:
Predecoder(ThreadContext * _tc) :
- tc(_tc), basePC(0), offset(0),
+ tc(_tc), basePC(0), origPC(0), offset(0),
outOfBytes(true), emiIsReady(false),
- state(PrefixState)
- {}
+ state(ResetState)
+ {
+ emi.mode.mode = LongMode;
+ emi.mode.submode = SixtyFourBitMode;
+ }
ThreadContext * getTC()
{
@@ -185,9 +195,9 @@ namespace X86ISA
//Use this to give data to the predecoder. This should be used
//when there is control flow.
- void moreBytes(Addr currPC, Addr off, MachInst data)
+ void moreBytes(Addr pc, Addr fetchPC, Addr off, MachInst data)
{
- basePC = currPC;
+ basePC = fetchPC;
offset = off;
fetchChunk = data;
assert(off < sizeof(MachInst));
@@ -195,13 +205,6 @@ namespace X86ISA
process();
}
- //Use this to give data to the predecoder. This should be used
- //when instructions are executed in order.
- void moreBytes(MachInst machInst)
- {
- moreBytes(basePC + sizeof(machInst), 0, machInst);
- }
-
bool needMoreBytes()
{
return outOfBytes;
@@ -219,6 +222,15 @@ namespace X86ISA
emiIsReady = false;
return emi;
}
+
+ int getInstSize()
+ {
+ DPRINTF(Predecoder,
+ "Calculating the instruction size: "
+ "basePC: %#x offset: %#x origPC: %#x\n",
+ basePC, offset, origPC);
+ return basePC + offset - origPC;
+ }
};
};