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-rw-r--r--src/arch/x86/regs/misc.hh11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/arch/x86/regs/misc.hh b/src/arch/x86/regs/misc.hh
index 77f4e1bcd..48f7d974d 100644
--- a/src/arch/x86/regs/misc.hh
+++ b/src/arch/x86/regs/misc.hh
@@ -101,7 +101,7 @@ namespace X86ISA
enum MiscRegIndex
{
// Control registers
- // Most of these are invalid.
+ // Most of these are invalid. See isValidMiscReg() below.
MISCREG_CR_BASE,
MISCREG_CR0 = MISCREG_CR_BASE,
MISCREG_CR1,
@@ -399,6 +399,15 @@ namespace X86ISA
NUM_MISCREGS
};
+ static inline bool
+ isValidMiscReg(int index)
+ {
+ return (index >= MISCREG_CR0 && index < NUM_MISCREGS &&
+ index != MISCREG_CR1 &&
+ !(index > MISCREG_CR4 && index < MISCREG_CR8) &&
+ !(index > MISCREG_CR8 && index <= MISCREG_CR15));
+ }
+
static inline MiscRegIndex
MISCREG_CR(int index)
{