4 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/x86/regs/float.hh b/src/arch/x86/regs/float.hh
index 5ac33c40f..bdcffb86b 100644
--- a/src/arch/x86/regs/float.hh
+++ b/src/arch/x86/regs/float.hh
@@ -150,6 +150,6 @@ namespace X86ISA
     {
         return FLOATREG_FPR((top + index + 8) % 8);
     }
-};
+}
 
 #endif // __ARCH_X86_FLOATREGS_HH__
diff --git a/src/arch/x86/regs/int.hh b/src/arch/x86/regs/int.hh
index 2a1371051..0a682ef54 100644
--- a/src/arch/x86/regs/int.hh
+++ b/src/arch/x86/regs/int.hh
@@ -178,6 +178,6 @@ namespace X86ISA
             index = (index - 4) | foldBit;
         return (IntRegIndex)index;
     }
-};
+}
 
 #endif // __ARCH_X86_INTREGS_HH__
diff --git a/src/arch/x86/regs/misc.hh b/src/arch/x86/regs/misc.hh
index 74c6bd133..24420e8d5 100644
--- a/src/arch/x86/regs/misc.hh
+++ b/src/arch/x86/regs/misc.hh
@@ -915,6 +915,6 @@ namespace X86ISA
         Bitfield<11> enable;
         Bitfield<8> bsp;
     EndBitUnion(LocalApicBase)
-};
+}
 
 #endif // __ARCH_X86_INTREGS_HH__
diff --git a/src/arch/x86/regs/segment.hh b/src/arch/x86/regs/segment.hh
index 737934152..cebb1235b 100644
--- a/src/arch/x86/regs/segment.hh
+++ b/src/arch/x86/regs/segment.hh
@@ -63,6 +63,6 @@ namespace X86ISA
 
         NUM_SEGMENTREGS
     };
-};
+}
 
 #endif // __ARCH_X86_SEGMENTREGS_HH__