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Diffstat (limited to 'src/arch/x86/tlb.cc')
-rw-r--r--src/arch/x86/tlb.cc20
1 files changed, 17 insertions, 3 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 5280b9ba8..d7959da2c 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -632,12 +632,26 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation,
Process *p = tc->getProcessPtr();
TlbEntry newEntry;
bool success = p->pTable->lookup(vaddr, newEntry);
- if(!success && mode != Execute) {
+ if (!success && mode != Execute) {
p->checkAndAllocNextPage(vaddr);
success = p->pTable->lookup(vaddr, newEntry);
}
- if(!success) {
- panic("Tried to execute unmapped address %#x.\n", vaddr);
+ if (!success) {
+ if (req->isPrefetch()) {
+ return new PageFault(vaddr, true, mode, true, false);
+ } else {
+ const char *modeStr = "";
+ if (mode == Execute)
+ modeStr = "execute";
+ else if (mode == Read)
+ modeStr = "read";
+ else if (mode == Write)
+ modeStr = "write";
+ else
+ modeStr = "?";
+ panic("Tried to %s unmapped address %#x.\n",
+ modeStr, vaddr);
+ }
} else {
Addr alignedVaddr = p->pTable->pageAlign(vaddr);
DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,