diff options
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/mmapped_ipr.hh | 8 | ||||
| -rw-r--r-- | src/arch/x86/utility.cc | 6 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/x86/mmapped_ipr.hh b/src/arch/x86/mmapped_ipr.hh index f17b64cad..02c125171 100644 --- a/src/arch/x86/mmapped_ipr.hh +++ b/src/arch/x86/mmapped_ipr.hh @@ -53,7 +53,7 @@ namespace X86ISA { - inline Tick + inline Cycles handleIprRead(ThreadContext *xc, Packet *pkt) { Addr offset = pkt->getAddr() & mask(3); @@ -62,10 +62,10 @@ namespace X86ISA // Make sure we don't trot off the end of data. assert(offset + pkt->getSize() <= sizeof(MiscReg)); pkt->setData(((uint8_t *)&data) + offset); - return 1; + return Cycles(1); } - inline Tick + inline Cycles handleIprWrite(ThreadContext *xc, Packet *pkt) { Addr offset = pkt->getAddr() & mask(3); @@ -76,7 +76,7 @@ namespace X86ISA assert(offset + pkt->getSize() <= sizeof(MiscReg)); pkt->writeData(((uint8_t *)&data) + offset); xc->setMiscReg(index, gtoh(data)); - return 1; + return Cycles(1); } } diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc index acca97c49..65c1a9d32 100644 --- a/src/arch/x86/utility.cc +++ b/src/arch/x86/utility.cc @@ -176,7 +176,7 @@ void initCPU(ThreadContext *tc, int cpuId) // @todo: Control the relative frequency, in this case 16:1, of // the clocks in the Python code - interrupts->setClock(tc->getCpuPtr()->ticks(16)); + interrupts->setClock(tc->getCpuPtr()->clockPeriod() * 16); // TODO Set the SMRAM base address (SMBASE) to 0x00030000 @@ -189,12 +189,12 @@ void initCPU(ThreadContext *tc, int cpuId) void startupCPU(ThreadContext *tc, int cpuId) { if (cpuId == 0 || !FullSystem) { - tc->activate(0); + tc->activate(Cycles(0)); } else { // This is an application processor (AP). It should be initialized to // look like only the BIOS POST has run on it and put then put it into // a halted state. - tc->suspend(0); + tc->suspend(Cycles(0)); } } |