diff options
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/mmapped_ipr.hh (renamed from src/arch/x86/mmaped_ipr.hh) | 6 | ||||
| -rw-r--r-- | src/arch/x86/tlb.cc | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/x86/mmaped_ipr.hh b/src/arch/x86/mmapped_ipr.hh index 82fe95cef..525f54bfb 100644 --- a/src/arch/x86/mmaped_ipr.hh +++ b/src/arch/x86/mmapped_ipr.hh @@ -37,8 +37,8 @@ * Authors: Gabe Black */ -#ifndef __ARCH_X86_MMAPEDIPR_HH__ -#define __ARCH_X86_MMAPEDIPR_HH__ +#ifndef __ARCH_X86_MMAPPEDIPR_HH__ +#define __ARCH_X86_MMAPPEDIPR_HH__ /** * @file @@ -89,4 +89,4 @@ namespace X86ISA } }; -#endif // __ARCH_X86_MMAPEDIPR_HH__ +#endif // __ARCH_X86_MMAPPEDIPR_HH__ diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index dff62a4d7..ac32e86d7 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -179,7 +179,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc) panic("CPUID memory space not yet implemented!\n"); } else if (prefix == IntAddrPrefixMSR) { vaddr = vaddr >> 3; - req->setFlags(Request::MMAPED_IPR); + req->setFlags(Request::MMAPPED_IPR); Addr regNum = 0; switch (vaddr & ~IntAddrPrefixMask) { case 0x10: @@ -508,7 +508,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc) // space. assert(!(IOPort & ~0xFFFF)); if (IOPort == 0xCF8 && req->getSize() == 4) { - req->setFlags(Request::MMAPED_IPR); + req->setFlags(Request::MMAPPED_IPR); req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg)); } else if ((IOPort & ~mask(2)) == 0xCFC) { req->setFlags(Request::UNCACHEABLE); |