3 files changed, 8 insertions, 9 deletions

diff --git a/src/arch/x86/intmessage.hh b/src/arch/x86/intmessage.hh
index 6a5b3aa30..f5f8519e2 100644
--- a/src/arch/x86/intmessage.hh
+++ b/src/arch/x86/intmessage.hh
@@ -78,7 +78,7 @@ namespace X86ISA
     prepIntRequest(const uint8_t id, Addr offset, Addr size)
     {
         RequestPtr req = new Request(x86InterruptAddress(id, offset),
-                                     size, UNCACHEABLE);
+                                     size, Request::UNCACHEABLE);
         PacketPtr pkt = new Packet(req, MemCmd::MessageReq, Packet::Broadcast);
         pkt->allocate();
         return pkt;
diff --git a/src/arch/x86/pagetable_walker.cc b/src/arch/x86/pagetable_walker.cc
index e70c16b1d..564a04b38 100644
--- a/src/arch/x86/pagetable_walker.cc
+++ b/src/arch/x86/pagetable_walker.cc
@@ -298,11 +298,8 @@ Walker::doNext(PacketPtr &read, PacketPtr &write)
     }
     PacketPtr oldRead = read;
     //If we didn't return, we're setting up another read.
-    uint32_t flags = oldRead->req->getFlags();
-    if (uncacheable)
-        flags |= UNCACHEABLE;
-    else
-        flags &= ~UNCACHEABLE;
+    Request::Flags flags = oldRead->req->getFlags();
+    flags.set(Request::UNCACHEABLE, uncacheable);
     RequestPtr request =
         new Request(nextRead, oldRead->getSize(), flags);
     read = new Packet(request, MemCmd::ReadExReq, Packet::Broadcast);
@@ -365,8 +362,10 @@ Walker::start(ThreadContext * _tc, Addr vaddr)
 
     enableNX = efer.nxe;
 
-    RequestPtr request =
-        new Request(top, size, PHYSICAL | cr3.pcd ? UNCACHEABLE : 0);
+    Request::Flags flags = Request::PHYSICAL;
+    if (cr3.pcd)
+        flags.set(Request::UNCACHEABLE);
+    RequestPtr request = new Request(top, size, flags);
     read = new Packet(request, MemCmd::ReadExReq, Packet::Broadcast);
     read->allocate();
     Enums::MemoryMode memMode = sys->getMemoryMode();
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 4980c5fe5..6f1c1a03c 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -653,7 +653,7 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute)
             return new GeneralProtection(0);
         */
         // Force the access to be uncacheable.
-        req->setFlags(req->getFlags() | UNCACHEABLE);
+        req->setFlags(Request::UNCACHEABLE);
         req->setPaddr(x86LocalAPICAddress(tc->contextId(), paddr - baseAddr));
     }
 #endif