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-rw-r--r--src/arch/x86/tlb.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index ad23cb7e4..d7f9e6665 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -95,13 +95,13 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
Tick
DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt)
{
- return tc->getCpuPtr()->cycles(1);
+ return tc->getCpuPtr()->ticks(1);
}
Tick
DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt)
{
- return tc->getCpuPtr()->cycles(1);
+ return tc->getCpuPtr()->ticks(1);
}
#endif