diff options
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/isa.cc | 4 | ||||
| -rw-r--r-- | src/arch/x86/isa/microops/regop.isa | 3 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc index 9dd7fbb52..f092f4418 100644 --- a/src/arch/x86/isa.cc +++ b/src/arch/x86/isa.cc @@ -316,7 +316,7 @@ ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc) break; case MISCREG_DR4: miscReg = MISCREG_DR6; - /* Fall through to have the same effects as DR6. */ + M5_FALLTHROUGH; case MISCREG_DR6: { DR6 dr6 = regVal[MISCREG_DR6]; @@ -333,7 +333,7 @@ ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc) break; case MISCREG_DR5: miscReg = MISCREG_DR7; - /* Fall through to have the same effects as DR7. */ + M5_FALLTHROUGH; case MISCREG_DR7: { DR7 dr7 = regVal[MISCREG_DR7]; diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index 4fd3b2aa6..2d5ae048a 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -1427,6 +1427,7 @@ let {{ if (bits(newVal, 63, 4)) fault = std::make_shared<GeneralProtection>(0); } + break; default: fault = std::make_shared<GenericISA::M5PanicFault>( "Unrecognized control register %d.\\n", dest); @@ -1528,7 +1529,7 @@ let {{ fault = std::make_shared<GeneralProtection>(selector); break; } - // Fall through on purpose + M5_FALLTHROUGH; case SegIntGateCheck: // Make sure the gate's the right type. if ((m5reg.mode == LongMode && (desc.type & 0xe) != 0xe) || |