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-rw-r--r--src/arch/x86/interrupts.cc5
-rw-r--r--src/arch/x86/interrupts.hh8
2 files changed, 8 insertions, 5 deletions
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 612244f49..6a9f07af2 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -554,7 +554,7 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val)
break;
}
pendingIPIs += apics.size();
- intPort->sendMessage(apics, message, timing);
+ intPort.sendMessage(apics, message, timing);
newVal = regs[APIC_INTERRUPT_COMMAND_LOW];
}
break;
@@ -612,7 +612,8 @@ X86ISA::Interrupts::Interrupts(Params * p) :
pendingInit(false), initVector(0),
pendingStartup(false), startupVector(0),
startedUp(false), pendingUnmaskableInt(false),
- pendingIPIs(0), cpu(NULL)
+ pendingIPIs(0), cpu(NULL),
+ intSlavePort(name() + ".int_slave", this, this, latency)
{
pioSize = PageBytes;
memset(regs, 0, sizeof(regs));
diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh
index 13ad2069b..abf3040bd 100644
--- a/src/arch/x86/interrupts.hh
+++ b/src/arch/x86/interrupts.hh
@@ -188,6 +188,9 @@ class Interrupts : public BasicPioDevice, IntDev
int initialApicId;
+ // Port for receiving interrupts
+ IntPort intSlavePort;
+
public:
int getInitialApicId() { return initialApicId; }
@@ -242,10 +245,9 @@ class Interrupts : public BasicPioDevice, IntDev
// Python class we also need two ports even if they are
// identical
if (if_name == "int_master") {
- return intPort;
+ return &intPort;
} else if (if_name == "int_slave") {
- // memory leak...but will be removed in the next patch
- return new IntPort(name() + ".int_slave", this, this, latency);
+ return &intSlavePort;
}
return BasicPioDevice::getPort(if_name, idx);
}