diff options
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/emulenv.cc | 2 | ||||
| -rw-r--r-- | src/arch/x86/insts/microop.cc | 4 | ||||
| -rw-r--r-- | src/arch/x86/predecoder.cc | 8 | ||||
| -rw-r--r-- | src/arch/x86/regfile.cc | 2 |
4 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/x86/emulenv.cc b/src/arch/x86/emulenv.cc index 31b705d79..142e233db 100644 --- a/src/arch/x86/emulenv.cc +++ b/src/arch/x86/emulenv.cc @@ -91,7 +91,7 @@ void EmulEnv::doModRM(const ExtMachInst & machInst) //Figure out what segment to use. This won't be entirely accurate since //the presence of a displacement is supposed to make the instruction //default to the data segment. - if (base != INTREG_RBP && base != INTREG_RSP || + if ((base != INTREG_RBP && base != INTREG_RSP) || 0/*Has an immediate offset*/) { seg = SEGMENT_REG_DS; //Handle any segment override that might have been in the instruction diff --git a/src/arch/x86/insts/microop.cc b/src/arch/x86/insts/microop.cc index 494c0b303..c7bfc3703 100644 --- a/src/arch/x86/insts/microop.cc +++ b/src/arch/x86/insts/microop.cc @@ -98,7 +98,7 @@ namespace X86ISA case ConditionTests::SxOF: return ccflags.sf ^ ccflags.of; case ConditionTests::SxOvZF: - return ccflags.sf ^ ccflags.of | ccflags.zf; + return (ccflags.sf ^ ccflags.of) | ccflags.zf; case ConditionTests::False: return false; case ConditionTests::NotECF: @@ -131,7 +131,7 @@ namespace X86ISA case ConditionTests::NotSxOF: return !(ccflags.sf ^ ccflags.of); case ConditionTests::NotSxOvZF: - return !(ccflags.sf ^ ccflags.of | ccflags.zf); + return !((ccflags.sf ^ ccflags.of) | ccflags.zf); } panic("Unknown condition: %d\n", condition); return true; diff --git a/src/arch/x86/predecoder.cc b/src/arch/x86/predecoder.cc index 1d415ffea..9d60089e3 100644 --- a/src/arch/x86/predecoder.cc +++ b/src/arch/x86/predecoder.cc @@ -319,17 +319,17 @@ namespace X86ISA if (emi.mode.submode != SixtyFourBitMode && !csAttr.defaultSize) { //figure out 16 bit displacement size - if(modRM.mod == 0 && modRM.rm == 6 || modRM.mod == 2) + if ((modRM.mod == 0 && modRM.rm == 6) || modRM.mod == 2) displacementSize = 2; - else if(modRM.mod == 1) + else if (modRM.mod == 1) displacementSize = 1; else displacementSize = 0; } else { //figure out 32/64 bit displacement size - if(modRM.mod == 0 && modRM.rm == 5 || modRM.mod == 2) + if ((modRM.mod == 0 && modRM.rm == 5) || modRM.mod == 2) displacementSize = 4; - else if(modRM.mod == 1) + else if (modRM.mod == 1) displacementSize = 1; else displacementSize = 0; diff --git a/src/arch/x86/regfile.cc b/src/arch/x86/regfile.cc index c27ab08ba..3fda345cc 100644 --- a/src/arch/x86/regfile.cc +++ b/src/arch/x86/regfile.cc @@ -214,7 +214,7 @@ int X86ISA::flattenIntIndex(ThreadContext * tc, int reg) //If we need to fold over the index to match byte semantics, do that. //Otherwise, just strip off any extra bits and pass it through. if (reg & (1 << 6)) - return (reg & ~(1 << 6) - 0x4); + return (reg & (~(1 << 6) - 0x4)); else return (reg & ~(1 << 6)); } |