2 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index e3a4befb2..b7d9335d4 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -135,6 +135,9 @@ namespace X86ISA
     void PageFault::invoke(ThreadContext * tc, const StaticInstPtr &inst)
     {
         if (FullSystem) {
+            /* Invalidate any matching TLB entries before handling the page fault */
+            tc->getITBPtr()->demapPage(addr, 0);
+            tc->getDTBPtr()->demapPage(addr, 0);
             HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
             X86FaultBase::invoke(tc);
             /*
diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh
index f8715ded2..6eabd53fa 100644
--- a/src/arch/x86/faults.hh
+++ b/src/arch/x86/faults.hh
@@ -42,7 +42,7 @@
 
 #include <string>
 
-#include "arch/generic/tlb.hh"
+#include "arch/x86/tlb.hh"
 #include "base/bitunion.hh"
 #include "base/misc.hh"
 #include "sim/faults.hh"