summaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/isa/formats/basic.isa1
-rw-r--r--src/arch/arm/isa/formats/mem.isa12
-rw-r--r--src/arch/arm/isa/formats/pred.isa1
3 files changed, 0 insertions, 14 deletions
diff --git a/src/arch/arm/isa/formats/basic.isa b/src/arch/arm/isa/formats/basic.isa
index d154b987c..c961abe96 100644
--- a/src/arch/arm/isa/formats/basic.isa
+++ b/src/arch/arm/isa/formats/basic.isa
@@ -62,7 +62,6 @@ def template BasicExecute {{
{
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(code)s;
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index c5453ec48..c8696cc7f 100644
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -211,7 +211,6 @@ def template EACompExecute {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
@@ -236,7 +235,6 @@ def template LoadMemAccExecute {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
EA = xc->getEA();
@@ -265,7 +263,6 @@ def template LoadExecute {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
@@ -294,7 +291,6 @@ def template LoadInitiateAcc {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_src_decl)s;
%(op_rd)s;
%(ea_code)s;
@@ -318,7 +314,6 @@ def template LoadCompleteAcc {{
{
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
@@ -349,7 +344,6 @@ def template StoreMemAccExecute {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
@@ -380,7 +374,6 @@ def template StoreExecute {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
@@ -413,7 +406,6 @@ def template StoreInitiateAcc {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
@@ -448,7 +440,6 @@ def template StoreCompleteAcc {{
{
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_dest_decl)s;
if (%(predicate_test)s)
@@ -469,7 +460,6 @@ def template StoreCondCompleteAcc {{
{
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_dest_decl)s;
if (%(predicate_test)s)
@@ -491,7 +481,6 @@ def template MiscMemAccExecute {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
@@ -515,7 +504,6 @@ def template MiscExecute {{
Addr EA;
Fault fault = NoFault;
- %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
diff --git a/src/arch/arm/isa/formats/pred.isa b/src/arch/arm/isa/formats/pred.isa
index eccec58bd..0258eb8ef 100644
--- a/src/arch/arm/isa/formats/pred.isa
+++ b/src/arch/arm/isa/formats/pred.isa
@@ -174,7 +174,6 @@ def template PredOpExecute {{
if (%(predicate_test)s)
{
- %(fp_enable_check)s;
%(code)s;
if (fault == NoFault)
{