diff options
Diffstat (limited to 'src/arch')
35 files changed, 238 insertions, 267 deletions
diff --git a/src/arch/alpha/freebsd/system.cc b/src/arch/alpha/freebsd/system.cc index 81aea8696..303d5f762 100644 --- a/src/arch/alpha/freebsd/system.cc +++ b/src/arch/alpha/freebsd/system.cc @@ -76,8 +76,8 @@ FreebsdAlphaSystem::doCalibrateClocks(ThreadContext *tc) ppc_vaddr = (Addr)tc->readIntReg(17); timer_vaddr = (Addr)tc->readIntReg(18); - virtProxy->write(ppc_vaddr, (uint32_t)SimClock::Frequency); - virtProxy->write(timer_vaddr, (uint32_t)TIMER_FREQUENCY); + virtProxy.write(ppc_vaddr, (uint32_t)SimClock::Frequency); + virtProxy.write(timer_vaddr, (uint32_t)TIMER_FREQUENCY); } void diff --git a/src/arch/alpha/linux/system.cc b/src/arch/alpha/linux/system.cc index 6f3cf6b32..e42553b63 100644 --- a/src/arch/alpha/linux/system.cc +++ b/src/arch/alpha/linux/system.cc @@ -88,9 +88,9 @@ LinuxAlphaSystem::initState() * Since we aren't using a bootloader, we have to copy the * kernel arguments directly into the kernel's memory. */ - virtProxy->writeBlob(CommandLine(), - (uint8_t*)params()->boot_osflags.c_str(), - params()->boot_osflags.length()+1); + virtProxy.writeBlob(CommandLine(), + (uint8_t*)params()->boot_osflags.c_str(), + params()->boot_osflags.length()+1); /** * find the address of the est_cycle_freq variable and insert it @@ -98,8 +98,8 @@ LinuxAlphaSystem::initState() * calculated it by using the PIT, RTC, etc. */ if (kernelSymtab->findAddress("est_cycle_freq", addr)) - virtProxy->write(addr, (uint64_t)(SimClock::Frequency / - params()->boot_cpu_frequency)); + virtProxy.write(addr, (uint64_t)(SimClock::Frequency / + params()->boot_cpu_frequency)); /** @@ -109,7 +109,7 @@ LinuxAlphaSystem::initState() * 255 ASNs. */ if (kernelSymtab->findAddress("dp264_mv", addr)) - virtProxy->write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127)); + virtProxy.write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127)); else panic("could not find dp264_mv\n"); @@ -176,10 +176,8 @@ LinuxAlphaSystem::setDelayLoop(ThreadContext *tc) if (kernelSymtab->findAddress("loops_per_jiffy", addr)) { Tick cpuFreq = tc->getCpuPtr()->frequency(); assert(intrFreq); - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); - vp->writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988)); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + vp.writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988)); } } diff --git a/src/arch/alpha/linux/threadinfo.hh b/src/arch/alpha/linux/threadinfo.hh index 262da9007..94e362fe7 100644 --- a/src/arch/alpha/linux/threadinfo.hh +++ b/src/arch/alpha/linux/threadinfo.hh @@ -78,8 +78,8 @@ class ThreadInfo if (!addr) addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23); - PortProxy* p = tc->getPhysProxy(); - p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); + PortProxy &p = tc->getPhysProxy(); + p.readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); return sp & ~ULL(0x3fff); } diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc index 4a3079264..07208fb29 100644 --- a/src/arch/alpha/process.cc +++ b/src/arch/alpha/process.cc @@ -144,16 +144,16 @@ AlphaLiveProcess::argsInit(int intSize, int pageSize) else panic("Unknown int size"); - initVirtMem->writeBlob(stack_min, (uint8_t*)&argc, intSize); + initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize); copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); //Copy the aux stuff for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { - initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, + initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, (uint8_t*)&(auxv[x].a_type), intSize); - initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, + initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, (uint8_t*)&(auxv[x].a_val), intSize); } diff --git a/src/arch/alpha/stacktrace.cc b/src/arch/alpha/stacktrace.cc index e83827630..7c23489a3 100644 --- a/src/arch/alpha/stacktrace.cc +++ b/src/arch/alpha/stacktrace.cc @@ -48,28 +48,28 @@ ProcessInfo::ProcessInfo(ThreadContext *_tc) : tc(_tc) { Addr addr = 0; - FSTranslatingPortProxy* vp = tc->getVirtProxy(); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab; if (!symtab->findAddress("thread_info_size", addr)) panic("thread info not compiled into kernel\n"); - thread_info_size = vp->readGtoH<int32_t>(addr); + thread_info_size = vp.readGtoH<int32_t>(addr); if (!symtab->findAddress("task_struct_size", addr)) panic("thread info not compiled into kernel\n"); - task_struct_size = vp->readGtoH<int32_t>(addr); + task_struct_size = vp.readGtoH<int32_t>(addr); if (!symtab->findAddress("thread_info_task", addr)) panic("thread info not compiled into kernel\n"); - task_off = vp->readGtoH<int32_t>(addr); + task_off = vp.readGtoH<int32_t>(addr); if (!symtab->findAddress("task_struct_pid", addr)) panic("thread info not compiled into kernel\n"); - pid_off = vp->readGtoH<int32_t>(addr); + pid_off = vp.readGtoH<int32_t>(addr); if (!symtab->findAddress("task_struct_comm", addr)) panic("thread info not compiled into kernel\n"); - name_off = vp->readGtoH<int32_t>(addr); + name_off = vp.readGtoH<int32_t>(addr); } Addr @@ -81,10 +81,8 @@ ProcessInfo::task(Addr ksp) const Addr tsk; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); - tsk = vp->readGtoH<Addr>(base + task_off); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + tsk = vp.readGtoH<Addr>(base + task_off); return tsk; } @@ -98,10 +96,8 @@ ProcessInfo::pid(Addr ksp) const uint16_t pd; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); - pd = vp->readGtoH<uint16_t>(task + pid_off); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + pd = vp.readGtoH<uint16_t>(task + pid_off); return pd; } diff --git a/src/arch/alpha/system.cc b/src/arch/alpha/system.cc index 656ab4d6f..8d6629169 100644 --- a/src/arch/alpha/system.cc +++ b/src/arch/alpha/system.cc @@ -119,8 +119,8 @@ AlphaSystem::initState() * others do.) */ if (consoleSymtab->findAddress("env_booted_osflags", addr)) { - virtProxy->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(), - strlen(params()->boot_osflags.c_str())); + virtProxy.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(), + strlen(params()->boot_osflags.c_str())); } /** @@ -130,9 +130,9 @@ AlphaSystem::initState() if (consoleSymtab->findAddress("m5_rpb", addr)) { uint64_t data; data = htog(params()->system_type); - virtProxy->write(addr+0x50, data); + virtProxy.write(addr+0x50, data); data = htog(params()->system_rev); - virtProxy->write(addr+0x58, data); + virtProxy.write(addr+0x58, data); } else panic("could not find hwrpb\n"); } @@ -178,8 +178,8 @@ AlphaSystem::fixFuncEventAddr(Addr addr) // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16); - uint32_t i1 = virtProxy->read<uint32_t>(addr); - uint32_t i2 = virtProxy->read<uint32_t>(addr + sizeof(MachInst)); + uint32_t i1 = virtProxy.read<uint32_t>(addr); + uint32_t i2 = virtProxy.read<uint32_t>(addr + sizeof(MachInst)); if ((i1 & inst_mask) == gp_ldah_pattern && (i2 & inst_mask) == gp_lda_pattern) { @@ -196,7 +196,7 @@ AlphaSystem::setAlphaAccess(Addr access) { Addr addr = 0; if (consoleSymtab->findAddress("m5AlphaAccess", addr)) { - virtProxy->write(addr, htog(Phys2K0Seg(access))); + virtProxy.write(addr, htog(Phys2K0Seg(access))); } else { panic("could not find m5AlphaAccess\n"); } diff --git a/src/arch/alpha/tru64/system.cc b/src/arch/alpha/tru64/system.cc index 13cc93247..cb4b8dd56 100644 --- a/src/arch/alpha/tru64/system.cc +++ b/src/arch/alpha/tru64/system.cc @@ -47,7 +47,7 @@ Tru64AlphaSystem::Tru64AlphaSystem(Tru64AlphaSystem::Params *p) { Addr addr = 0; if (kernelSymtab->findAddress("enable_async_printf", addr)) { - virtProxy->write(addr, (uint32_t)0); + virtProxy.write(addr, (uint32_t)0); } #ifdef DEBUG diff --git a/src/arch/alpha/utility.cc b/src/arch/alpha/utility.cc index 1bac650a0..32fc0b141 100644 --- a/src/arch/alpha/utility.cc +++ b/src/arch/alpha/utility.cc @@ -52,9 +52,10 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp) return tc->readIntReg(16 + number); } else { Addr sp = tc->readIntReg(StackPointerReg); - FSTranslatingPortProxy* vp = tc->getVirtProxy(); - uint64_t arg = vp->read<uint64_t>(sp + - (number-NumArgumentRegs) * sizeof(uint64_t)); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + uint64_t arg = vp.read<uint64_t>(sp + + (number-NumArgumentRegs) * + sizeof(uint64_t)); return arg; } } diff --git a/src/arch/alpha/vtophys.cc b/src/arch/alpha/vtophys.cc index 453c48444..8ca23fce2 100644 --- a/src/arch/alpha/vtophys.cc +++ b/src/arch/alpha/vtophys.cc @@ -45,24 +45,24 @@ using namespace std; namespace AlphaISA { PageTableEntry -kernel_pte_lookup(PortProxy* mem, Addr ptbr, VAddr vaddr) +kernel_pte_lookup(PortProxy &mem, Addr ptbr, VAddr vaddr) { Addr level1_pte = ptbr + vaddr.level1(); - PageTableEntry level1 = mem->read<uint64_t>(level1_pte); + PageTableEntry level1 = mem.read<uint64_t>(level1_pte); if (!level1.valid()) { DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr); return 0; } Addr level2_pte = level1.paddr() + vaddr.level2(); - PageTableEntry level2 = mem->read<uint64_t>(level2_pte); + PageTableEntry level2 = mem.read<uint64_t>(level2_pte); if (!level2.valid()) { DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr); return 0; } Addr level3_pte = level2.paddr() + vaddr.level3(); - PageTableEntry level3 = mem->read<uint64_t>(level3_pte); + PageTableEntry level3 = mem.read<uint64_t>(level3_pte); if (!level3.valid()) { DPRINTF(VtoPhys, "level 3 PTE not valid, va = %#x\n", vaddr); return 0; diff --git a/src/arch/alpha/vtophys.hh b/src/arch/alpha/vtophys.hh index 1695676cb..8613e8e77 100644 --- a/src/arch/alpha/vtophys.hh +++ b/src/arch/alpha/vtophys.hh @@ -41,7 +41,7 @@ class PortProxy; namespace AlphaISA { -PageTableEntry kernel_pte_lookup(PortProxy* mem, Addr ptbr, +PageTableEntry kernel_pte_lookup(PortProxy &mem, Addr ptbr, VAddr vaddr); Addr vtophys(Addr vaddr); diff --git a/src/arch/arm/linux/process.cc b/src/arch/arm/linux/process.cc index 1074b0362..fcf00c84e 100644 --- a/src/arch/arm/linux/process.cc +++ b/src/arch/arm/linux/process.cc @@ -452,7 +452,7 @@ setTLSFunc(SyscallDesc *desc, int callnum, LiveProcess *process, int index = 0; uint32_t tlsPtr = process->getSyscallArg(tc, index); - tc->getMemProxy()->writeBlob(ArmLinuxProcess::commPage + 0x0ff0, + tc->getMemProxy().writeBlob(ArmLinuxProcess::commPage + 0x0ff0, (uint8_t *)&tlsPtr, sizeof(tlsPtr)); tc->setMiscReg(MISCREG_TPIDRURO,tlsPtr); return 0; @@ -512,7 +512,7 @@ ArmLinuxProcess::initState() // Fill this page with swi -1 so we'll no if we land in it somewhere. for (Addr addr = 0; addr < PageBytes; addr += sizeof(swiNeg1)) { - tc->getMemProxy()->writeBlob(commPage + addr, + tc->getMemProxy().writeBlob(commPage + addr, swiNeg1, sizeof(swiNeg1)); } @@ -521,7 +521,7 @@ ArmLinuxProcess::initState() 0x5f, 0xf0, 0x7f, 0xf5, // dmb 0x0e, 0xf0, 0xa0, 0xe1 // return }; - tc->getMemProxy()->writeBlob(commPage + 0x0fa0, memory_barrier, + tc->getMemProxy().writeBlob(commPage + 0x0fa0, memory_barrier, sizeof(memory_barrier)); uint8_t cmpxchg[] = @@ -535,7 +535,7 @@ ArmLinuxProcess::initState() 0x5f, 0xf0, 0x7f, 0xf5, // dmb 0x0e, 0xf0, 0xa0, 0xe1 // return }; - tc->getMemProxy()->writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg)); + tc->getMemProxy().writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg)); uint8_t get_tls[] = { @@ -543,7 +543,7 @@ ArmLinuxProcess::initState() 0x70, 0x0f, 0x1d, 0xee, // mrc p15, 0, r0, c13, c0, 3 0x0e, 0xf0, 0xa0, 0xe1 // return }; - tc->getMemProxy()->writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls)); + tc->getMemProxy().writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls)); } ArmISA::IntReg diff --git a/src/arch/arm/linux/system.cc b/src/arch/arm/linux/system.cc index a764edaca..a2d0c156c 100644 --- a/src/arch/arm/linux/system.cc +++ b/src/arch/arm/linux/system.cc @@ -114,7 +114,7 @@ LinuxArmSystem::initState() DPRINTF(Loader, "Boot atags was %d bytes in total\n", size << 2); DDUMP(Loader, boot_data, size << 2); - physProxy->writeBlob(ParamsList, boot_data, size << 2); + physProxy.writeBlob(ParamsList, boot_data, size << 2); #ifndef NDEBUG kernelPanicEvent = addKernelFuncEvent<BreakPCEvent>("panic"); diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc index c149f5409..37999c905 100644 --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -284,17 +284,17 @@ ArmLiveProcess::argsInit(int intSize, int pageSize) //Write out the sentry void * uint32_t sentry_NULL = 0; - initVirtMem->writeBlob(sentry_base, + initVirtMem.writeBlob(sentry_base, (uint8_t*)&sentry_NULL, sentry_size); //Fix up the aux vectors which point to other data for (int i = auxv.size() - 1; i >= 0; i--) { if (auxv[i].a_type == M5_AT_PLATFORM) { auxv[i].a_val = platform_base; - initVirtMem->writeString(platform_base, platform.c_str()); + initVirtMem.writeString(platform_base, platform.c_str()); } else if (auxv[i].a_type == M5_AT_EXECFN) { auxv[i].a_val = aux_data_base; - initVirtMem->writeString(aux_data_base, filename.c_str()); + initVirtMem.writeString(aux_data_base, filename.c_str()); } else if (auxv[i].a_type == M5_AT_RANDOM) { auxv[i].a_val = aux_random_base; // Just leave the value 0, we don't want randomness @@ -304,20 +304,20 @@ ArmLiveProcess::argsInit(int intSize, int pageSize) //Copy the aux stuff for(int x = 0; x < auxv.size(); x++) { - initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, + initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, (uint8_t*)&(auxv[x].a_type), intSize); - initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, + initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, (uint8_t*)&(auxv[x].a_val), intSize); } //Write out the terminating zeroed auxilliary vector const uint64_t zero = 0; - initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), + initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(), (uint8_t*)&zero, 2 * intSize); copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); - initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); + initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); ThreadContext *tc = system->getThreadContext(contextIds[0]); //Set the stack pointer register diff --git a/src/arch/arm/stacktrace.cc b/src/arch/arm/stacktrace.cc index 69d0f354c..99ebcd7c5 100644 --- a/src/arch/arm/stacktrace.cc +++ b/src/arch/arm/stacktrace.cc @@ -48,29 +48,27 @@ namespace ArmISA { Addr addr = 0; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr)) panic("thread info not compiled into kernel\n"); - thread_info_size = vp->readGtoH<int32_t>(addr); + thread_info_size = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr)) panic("thread info not compiled into kernel\n"); - task_struct_size = vp->readGtoH<int32_t>(addr); + task_struct_size = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr)) panic("thread info not compiled into kernel\n"); - task_off = vp->readGtoH<int32_t>(addr); + task_off = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr)) panic("thread info not compiled into kernel\n"); - pid_off = vp->readGtoH<int32_t>(addr); + pid_off = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr)) panic("thread info not compiled into kernel\n"); - name_off = vp->readGtoH<int32_t>(addr); + name_off = vp.readGtoH<int32_t>(addr); } Addr diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc index ca5bfc471..c26be6026 100644 --- a/src/arch/arm/system.cc +++ b/src/arch/arm/system.cc @@ -85,7 +85,7 @@ ArmSystem::initState() { 0x07, 0xf0, 0xa0, 0xe1 // branch to r7 }; - physProxy->writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl)); + physProxy.writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl)); inform("Using bootloader at address %#x\n", bootldr->entryPoint()); } diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index 0527e135f..0a1cefce7 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -91,18 +91,18 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp) } } else { Addr sp = tc->readIntReg(StackPointerReg); - FSTranslatingPortProxy* vp = tc->getVirtProxy(); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); uint64_t arg; if (size == sizeof(uint64_t)) { // If the argument is even it must be aligned if ((number % 2) != 0) number++; - arg = vp->read<uint64_t>(sp + + arg = vp.read<uint64_t>(sp + (number-NumArgumentRegs) * sizeof(uint32_t)); // since two 32 bit args == 1 64 bit arg, increment number number++; } else { - arg = vp->read<uint32_t>(sp + + arg = vp.read<uint32_t>(sp + (number-NumArgumentRegs) * sizeof(uint32_t)); } return arg; diff --git a/src/arch/arm/vtophys.cc b/src/arch/arm/vtophys.cc index 45e6f1849..7c26962cb 100644 --- a/src/arch/arm/vtophys.cc +++ b/src/arch/arm/vtophys.cc @@ -101,11 +101,11 @@ ArmISA::vtophys(ThreadContext *tc, Addr addr) N = 0; } - PortProxy* port = tc->getPhysProxy(); + PortProxy &port = tc->getPhysProxy(); Addr l1desc_addr = mbits(ttbr, 31, 14-N) | (bits(addr,31-N,20) << 2); TableWalker::L1Descriptor l1desc; - l1desc.data = port->read<uint32_t>(l1desc_addr); + l1desc.data = port.read<uint32_t>(l1desc_addr); if (l1desc.type() == TableWalker::L1Descriptor::Ignore || l1desc.type() == TableWalker::L1Descriptor::Reserved) { warn("Unable to translate virtual address: %#x\n", addr); @@ -117,7 +117,7 @@ ArmISA::vtophys(ThreadContext *tc, Addr addr) // Didn't find it at the first level, try againt Addr l2desc_addr = l1desc.l2Addr() | (bits(addr, 19, 12) << 2); TableWalker::L2Descriptor l2desc; - l2desc.data = port->read<uint32_t>(l2desc_addr); + l2desc.data = port.read<uint32_t>(l2desc_addr); if (l2desc.invalid()) { warn("Unable to translate virtual address: %#x\n", addr); diff --git a/src/arch/mips/linux/threadinfo.hh b/src/arch/mips/linux/threadinfo.hh index 40dd435d6..5788b3b43 100644 --- a/src/arch/mips/linux/threadinfo.hh +++ b/src/arch/mips/linux/threadinfo.hh @@ -79,8 +79,8 @@ class ThreadInfo if (!addr) addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/); - PortProxy* p = tc->getPhysProxy(); - p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); + PortProxy &p = tc->getPhysProxy(); + p.readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); return sp & ~ULL(0x3fff); } diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc index 5643ff18a..4ed9a7b39 100644 --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -150,7 +150,7 @@ MipsLiveProcess::argsInit(int pageSize) argc = htog((IntType)argc); - initVirtMem->writeBlob(stack_min, (uint8_t*)&argc, intSize); + initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize); copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); @@ -158,9 +158,9 @@ MipsLiveProcess::argsInit(int pageSize) // Copy the aux vector for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { - initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, + initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, (uint8_t*)&(auxv[x].a_type), intSize); - initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, + initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, (uint8_t*)&(auxv[x].a_val), intSize); } @@ -168,7 +168,7 @@ MipsLiveProcess::argsInit(int pageSize) for (unsigned i = 0; i < 2; i++) { const IntType zero = 0; const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i); - initVirtMem->writeBlob(addr, (uint8_t*)&zero, intSize); + initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize); } ThreadContext *tc = system->getThreadContext(contextIds[0]); diff --git a/src/arch/mips/stacktrace.cc b/src/arch/mips/stacktrace.cc index d4548b4bb..bb761a243 100644 --- a/src/arch/mips/stacktrace.cc +++ b/src/arch/mips/stacktrace.cc @@ -55,10 +55,8 @@ ProcessInfo::task(Addr ksp) const Addr tsk; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); - tsk = vp->readGtoH<Addr>(base + task_off); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + tsk = vp.readGtoH<Addr>(base + task_off); return tsk; } @@ -72,10 +70,8 @@ ProcessInfo::pid(Addr ksp) const uint16_t pd; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); - pd = vp->readGtoH<uint16_t>(task + pid_off); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + pd = vp.readGtoH<uint16_t>(task + pid_off); return pd; } diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc index 4a5c06673..3c5d1e8b4 100644 --- a/src/arch/power/process.cc +++ b/src/arch/power/process.cc @@ -218,37 +218,37 @@ PowerLiveProcess::argsInit(int intSize, int pageSize) //Write out the sentry void * uint32_t sentry_NULL = 0; - initVirtMem->writeBlob(sentry_base, + initVirtMem.writeBlob(sentry_base, (uint8_t*)&sentry_NULL, sentry_size); //Fix up the aux vectors which point to other data for (int i = auxv.size() - 1; i >= 0; i--) { if (auxv[i].a_type == M5_AT_PLATFORM) { auxv[i].a_val = platform_base; - initVirtMem->writeString(platform_base, platform.c_str()); + initVirtMem.writeString(platform_base, platform.c_str()); } else if (auxv[i].a_type == M5_AT_EXECFN) { auxv[i].a_val = aux_data_base; - initVirtMem->writeString(aux_data_base, filename.c_str()); + initVirtMem.writeString(aux_data_base, filename.c_str()); } } //Copy the aux stuff for (int x = 0; x < auxv.size(); x++) { - initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, + initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, (uint8_t*)&(auxv[x].a_type), intSize); - initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, + initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, (uint8_t*)&(auxv[x].a_val), intSize); } //Write out the terminating zeroed auxilliary vector const uint64_t zero = 0; - initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), + initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(), (uint8_t*)&zero, 2 * intSize); copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); - initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); + initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); ThreadContext *tc = system->getThreadContext(contextIds[0]); diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index 769f15497..9377fe7d0 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -359,31 +359,31 @@ SparcLiveProcess::argsInit(int pageSize) // Write out the sentry void * uint64_t sentry_NULL = 0; - initVirtMem->writeBlob(sentry_base, + initVirtMem.writeBlob(sentry_base, (uint8_t*)&sentry_NULL, sentry_size); // Write the file name - initVirtMem->writeString(file_name_base, filename.c_str()); + initVirtMem.writeString(file_name_base, filename.c_str()); // Copy the aux stuff for (int x = 0; x < auxv.size(); x++) { - initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, + initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, (uint8_t*)&(auxv[x].a_type), intSize); - initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, + initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, (uint8_t*)&(auxv[x].a_val), intSize); } // Write out the terminating zeroed auxilliary vector const IntType zero = 0; - initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(), + initVirtMem.writeBlob(auxv_array_base + intSize * 2 * auxv.size(), (uint8_t*)&zero, intSize); - initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1), + initVirtMem.writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1), (uint8_t*)&zero, intSize); copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); - initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); + initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); // Set up space for the trap handlers into the processes address space. // Since the stack grows down and there is reserved address space abov @@ -416,9 +416,9 @@ Sparc64LiveProcess::argsInit(int intSize, int pageSize) SparcLiveProcess::argsInit<uint64_t>(pageSize); // Stuff the trap handlers into the process address space - initVirtMem->writeBlob(fillStart, + initVirtMem.writeBlob(fillStart, (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts); - initVirtMem->writeBlob(spillStart, + initVirtMem.writeBlob(spillStart, (uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts); } @@ -428,9 +428,9 @@ Sparc32LiveProcess::argsInit(int intSize, int pageSize) SparcLiveProcess::argsInit<uint32_t>(pageSize); // Stuff the trap handlers into the process address space - initVirtMem->writeBlob(fillStart, + initVirtMem.writeBlob(fillStart, (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts); - initVirtMem->writeBlob(spillStart, + initVirtMem.writeBlob(spillStart, (uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts); } @@ -452,7 +452,7 @@ void Sparc32LiveProcess::flushWindows(ThreadContext *tc) for (int index = 16; index < 32; index++) { uint32_t regVal = tc->readIntReg(index); regVal = htog(regVal); - if (!tc->getMemProxy()->tryWriteBlob( + if (!tc->getMemProxy().tryWriteBlob( sp + (index - 16) * 4, (uint8_t *)®Val, 4)) { warn("Failed to save register to the stack when " "flushing windows.\n"); @@ -487,7 +487,7 @@ Sparc64LiveProcess::flushWindows(ThreadContext *tc) for (int index = 16; index < 32; index++) { IntReg regVal = tc->readIntReg(index); regVal = htog(regVal); - if (!tc->getMemProxy()->tryWriteBlob( + if (!tc->getMemProxy().tryWriteBlob( sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) { warn("Failed to save register to the stack when " "flushing windows.\n"); diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc index 272df690c..b9a07b57b 100644 --- a/src/arch/sparc/utility.cc +++ b/src/arch/sparc/utility.cc @@ -56,8 +56,8 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp) return tc->readIntReg(8 + number); } else { Addr sp = tc->readIntReg(StackPointerReg); - FSTranslatingPortProxy* vp = tc->getVirtProxy(); - uint64_t arg = vp->read<uint64_t>(sp + 92 + + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + uint64_t arg = vp.read<uint64_t>(sp + 92 + (number-NumArgumentRegs) * sizeof(uint64_t)); return arg; } diff --git a/src/arch/sparc/vtophys.cc b/src/arch/sparc/vtophys.cc index 7e3c5fe01..e3d4f5066 100644 --- a/src/arch/sparc/vtophys.cc +++ b/src/arch/sparc/vtophys.cc @@ -81,7 +81,7 @@ vtophys(ThreadContext *tc, Addr addr) int pri_context = bits(tlbdata,47,32); // int sec_context = bits(tlbdata,63,48); - PortProxy* mem = tc->getPhysProxy(); + PortProxy &mem = tc->getPhysProxy(); TLB* itb = tc->getITBPtr(); TLB* dtb = tc->getDTBPtr(); TlbEntry* tbe; @@ -110,9 +110,9 @@ vtophys(ThreadContext *tc, Addr addr) dtb->GetTsbPtr(tc, addr, ctx_zero ? 0 : pri_context, tsbs); va_tag = bits(addr, 63, 22); for (int x = 0; x < 4; x++) { - ttetag = betoh(mem->read<uint64_t>(tsbs[x])); + ttetag = betoh(mem.read<uint64_t>(tsbs[x])); if (ttetag.valid() && ttetag.va() == va_tag) { - uint64_t entry = mem->read<uint64_t>(tsbs[x]) + sizeof(uint64_t); + uint64_t entry = mem.read<uint64_t>(tsbs[x]) + sizeof(uint64_t); // I think it's sun4v at least! pte.populate(betoh(entry), PageTableEntry::sun4v); DPRINTF(VtoPhys, "Virtual(%#x)->Physical(%#x) found in TTE\n", diff --git a/src/arch/x86/bios/e820.cc b/src/arch/x86/bios/e820.cc index 7564fcec7..c966916f5 100644 --- a/src/arch/x86/bios/e820.cc +++ b/src/arch/x86/bios/e820.cc @@ -39,21 +39,21 @@ #include "arch/x86/bios/e820.hh" #include "arch/x86/isa_traits.hh" -#include "mem/port.hh" +#include "mem/port_proxy.hh" #include "sim/byteswap.hh" using namespace std; using namespace X86ISA; template<class T> -void writeVal(T val, Port * port, Addr &addr) +void writeVal(T val, PortProxy& proxy, Addr &addr) { T guestVal = htog(val); - port->writeBlob(addr, (uint8_t *)&guestVal, sizeof(T)); + proxy.writeBlob(addr, (uint8_t *)&guestVal, sizeof(T)); addr += sizeof(T); } -void X86ISA::E820Table::writeTo(Port * port, Addr countAddr, Addr addr) +void X86ISA::E820Table::writeTo(PortProxy& proxy, Addr countAddr, Addr addr) { uint8_t e820Nr = entries.size(); @@ -63,12 +63,12 @@ void X86ISA::E820Table::writeTo(Port * port, Addr countAddr, Addr addr) uint8_t guestE820Nr = htog(e820Nr); - port->writeBlob(countAddr, (uint8_t *)&guestE820Nr, sizeof(guestE820Nr)); + proxy.writeBlob(countAddr, (uint8_t *)&guestE820Nr, sizeof(guestE820Nr)); for (int i = 0; i < e820Nr; i++) { - writeVal(entries[i]->addr, port, addr); - writeVal(entries[i]->size, port, addr); - writeVal(entries[i]->type, port, addr); + writeVal(entries[i]->addr, proxy, addr); + writeVal(entries[i]->size, proxy, addr); + writeVal(entries[i]->type, proxy, addr); } } diff --git a/src/arch/x86/bios/e820.hh b/src/arch/x86/bios/e820.hh index cb8d5946c..b61708050 100644 --- a/src/arch/x86/bios/e820.hh +++ b/src/arch/x86/bios/e820.hh @@ -47,7 +47,7 @@ #include "params/X86E820Table.hh" #include "sim/sim_object.hh" -class Port; +class PortProxy; namespace X86ISA { @@ -75,7 +75,7 @@ namespace X86ISA E820Table(Params *p) : SimObject(p), entries(p->entries) {} - void writeTo(Port * port, Addr countAddr, Addr addr); + void writeTo(PortProxy& proxy, Addr countAddr, Addr addr); }; }; diff --git a/src/arch/x86/bios/intelmp.cc b/src/arch/x86/bios/intelmp.cc index 4c9c61adb..645c51b36 100644 --- a/src/arch/x86/bios/intelmp.cc +++ b/src/arch/x86/bios/intelmp.cc @@ -70,10 +70,10 @@ const char X86ISA::IntelMP::FloatingPointer::signature[] = "_MP_"; template<class T> uint8_t -writeOutField(PortProxy* proxy, Addr addr, T val) +writeOutField(PortProxy& proxy, Addr addr, T val) { uint64_t guestVal = X86ISA::htog(val); - proxy->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T)); + proxy.writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T)); uint8_t checkSum = 0; while(guestVal) { @@ -84,7 +84,7 @@ writeOutField(PortProxy* proxy, Addr addr, T val) } uint8_t -writeOutString(PortProxy* proxy, Addr addr, string str, int length) +writeOutString(PortProxy& proxy, Addr addr, string str, int length) { char cleanedString[length + 1]; cleanedString[length] = 0; @@ -97,7 +97,7 @@ writeOutString(PortProxy* proxy, Addr addr, string str, int length) memcpy(cleanedString, str.c_str(), str.length()); memset(cleanedString + str.length(), 0, length - str.length()); } - proxy->writeBlob(addr, (uint8_t *)(&cleanedString), length); + proxy.writeBlob(addr, (uint8_t *)(&cleanedString), length); uint8_t checkSum = 0; for (int i = 0; i < length; i++) @@ -107,7 +107,7 @@ writeOutString(PortProxy* proxy, Addr addr, string str, int length) } Addr -X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr) +X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy& proxy, Addr addr) { // Make sure that either a config table is present or a default // configuration was found but not both. @@ -120,7 +120,7 @@ X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr) uint8_t checkSum = 0; - proxy->writeBlob(addr, (uint8_t *)signature, 4); + proxy.writeBlob(addr, (uint8_t *)signature, 4); for (int i = 0; i < 4; i++) checkSum += signature[i]; @@ -128,20 +128,20 @@ X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr) // The length of the structure in paragraphs, aka 16 byte chunks. uint8_t length = 1; - proxy->writeBlob(addr + 8, &length, 1); + proxy.writeBlob(addr + 8, &length, 1); checkSum += length; - proxy->writeBlob(addr + 9, &specRev, 1); + proxy.writeBlob(addr + 9, &specRev, 1); checkSum += specRev; - proxy->writeBlob(addr + 11, &defaultConfig, 1); + proxy.writeBlob(addr + 11, &defaultConfig, 1); checkSum += defaultConfig; uint32_t features2_5 = imcrPresent ? (1 << 7) : 0; checkSum += writeOutField(proxy, addr + 12, features2_5); checkSum = -checkSum; - proxy->writeBlob(addr + 10, &checkSum, 1); + proxy.writeBlob(addr + 10, &checkSum, 1); return 16; } @@ -158,10 +158,10 @@ X86IntelMPFloatingPointerParams::create() } Addr -X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy* proxy, +X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum) { - proxy->writeBlob(addr, &type, 1); + proxy.writeBlob(addr, &type, 1); checkSum += type; return 1; } @@ -171,12 +171,12 @@ X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) : {} Addr -X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy* proxy, +X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum) { - proxy->writeBlob(addr, &type, 1); + proxy.writeBlob(addr, &type, 1); checkSum += type; - proxy->writeBlob(addr + 1, &length, 1); + proxy.writeBlob(addr + 1, &length, 1); checkSum += length; return 1; } @@ -189,17 +189,17 @@ X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(Params * p, const char X86ISA::IntelMP::ConfigTable::signature[] = "PCMP"; Addr -X86ISA::IntelMP::ConfigTable::writeOut(PortProxy* proxy, Addr addr) +X86ISA::IntelMP::ConfigTable::writeOut(PortProxy& proxy, Addr addr) { uint8_t checkSum = 0; - proxy->writeBlob(addr, (uint8_t *)signature, 4); + proxy.writeBlob(addr, (uint8_t *)signature, 4); for (int i = 0; i < 4; i++) checkSum += signature[i]; // Base table length goes here but will be calculated later. - proxy->writeBlob(addr + 6, (uint8_t *)(&specRev), 1); + proxy.writeBlob(addr + 6, (uint8_t *)(&specRev), 1); checkSum += specRev; // The checksum goes here but is still being calculated. @@ -213,7 +213,7 @@ X86ISA::IntelMP::ConfigTable::writeOut(PortProxy* proxy, Addr addr) checkSum += writeOutField(proxy, addr + 36, localApic); uint8_t reserved = 0; - proxy->writeBlob(addr + 43, &reserved, 1); + proxy.writeBlob(addr + 43, &reserved, 1); checkSum += reserved; vector<BaseConfigEntry *>::iterator baseEnt; @@ -261,7 +261,7 @@ X86IntelMPConfigTableParams::create() Addr X86ISA::IntelMP::Processor::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, localApicID); @@ -271,8 +271,8 @@ X86ISA::IntelMP::Processor::writeOut( checkSum += writeOutField(proxy, addr + 8, featureFlags); uint32_t reserved = 0; - proxy->writeBlob(addr + 12, (uint8_t *)(&reserved), 4); - proxy->writeBlob(addr + 16, (uint8_t *)(&reserved), 4); + proxy.writeBlob(addr + 12, (uint8_t *)(&reserved), 4); + proxy.writeBlob(addr + 16, (uint8_t *)(&reserved), 4); return 20; } @@ -298,7 +298,7 @@ X86IntelMPProcessorParams::create() Addr X86ISA::IntelMP::Bus::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, busID); @@ -318,7 +318,7 @@ X86IntelMPBusParams::create() Addr X86ISA::IntelMP::IOAPIC::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, id); @@ -343,7 +343,7 @@ X86IntelMPIOAPICParams::create() Addr X86ISA::IntelMP::IntAssignment::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, interruptType); @@ -381,7 +381,7 @@ X86IntelMPLocalIntAssignmentParams::create() Addr X86ISA::IntelMP::AddrSpaceMapping::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { ExtConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 2, busID); @@ -405,7 +405,7 @@ X86IntelMPAddrSpaceMappingParams::create() Addr X86ISA::IntelMP::BusHierarchy::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { ExtConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 2, busID); @@ -413,7 +413,7 @@ X86ISA::IntelMP::BusHierarchy::writeOut( checkSum += writeOutField(proxy, addr + 4, parentBus); uint32_t reserved = 0; - proxy->writeBlob(addr + 5, (uint8_t *)(&reserved), 3); + proxy.writeBlob(addr + 5, (uint8_t *)(&reserved), 3); return length; } @@ -434,7 +434,7 @@ X86IntelMPBusHierarchyParams::create() Addr X86ISA::IntelMP::CompatAddrSpaceMod::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { ExtConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 2, busID); diff --git a/src/arch/x86/bios/intelmp.hh b/src/arch/x86/bios/intelmp.hh index 4b730ad4b..909f8ad79 100644 --- a/src/arch/x86/bios/intelmp.hh +++ b/src/arch/x86/bios/intelmp.hh @@ -93,7 +93,7 @@ class FloatingPointer : public SimObject public: - Addr writeOut(PortProxy* proxy, Addr addr); + Addr writeOut(PortProxy& proxy, Addr addr); Addr getTableAddr() { @@ -117,7 +117,7 @@ class BaseConfigEntry : public SimObject public: - virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); BaseConfigEntry(Params * p, uint8_t _type); }; @@ -132,7 +132,7 @@ class ExtConfigEntry : public SimObject public: - virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length); }; @@ -155,7 +155,7 @@ class ConfigTable : public SimObject std::vector<ExtConfigEntry *> extEntries; public: - Addr writeOut(PortProxy* proxy, Addr addr); + Addr writeOut(PortProxy& proxy, Addr addr); ConfigTable(Params * p); }; @@ -172,7 +172,7 @@ class Processor : public BaseConfigEntry uint32_t featureFlags; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); Processor(Params * p); }; @@ -186,7 +186,7 @@ class Bus : public BaseConfigEntry std::string busType; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); Bus(Params * p); }; @@ -202,7 +202,7 @@ class IOAPIC : public BaseConfigEntry uint32_t address; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); IOAPIC(Params * p); }; @@ -221,7 +221,7 @@ class IntAssignment : public BaseConfigEntry uint8_t destApicIntIn; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); IntAssignment(X86IntelMPBaseConfigEntryParams * p, Enums::X86IntelMPInterruptType _interruptType, @@ -269,7 +269,7 @@ class AddrSpaceMapping : public ExtConfigEntry uint64_t addrLength; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); AddrSpaceMapping(Params * p); }; @@ -284,7 +284,7 @@ class BusHierarchy : public ExtConfigEntry uint8_t parentBus; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); BusHierarchy(Params * p); }; @@ -299,7 +299,7 @@ class CompatAddrSpaceMod : public ExtConfigEntry uint32_t rangeList; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); CompatAddrSpaceMod(Params * p); }; diff --git a/src/arch/x86/bios/smbios.cc b/src/arch/x86/bios/smbios.cc index a85ece1ec..9072664bf 100644 --- a/src/arch/x86/bios/smbios.cc +++ b/src/arch/x86/bios/smbios.cc @@ -74,15 +74,15 @@ composeBitVector(T vec) } uint16_t -X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy* proxy, Addr addr) +X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy& proxy, Addr addr) { - proxy->writeBlob(addr, (uint8_t *)(&type), 1); + proxy.writeBlob(addr, (uint8_t *)(&type), 1); uint8_t length = getLength(); - proxy->writeBlob(addr + 1, (uint8_t *)(&length), 1); + proxy.writeBlob(addr + 1, (uint8_t *)(&length), 1); uint16_t handleGuest = X86ISA::htog(handle); - proxy->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2); + proxy.writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2); return length + getStringLength(); } @@ -93,7 +93,7 @@ X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) : void X86ISA::SMBios::SMBiosStructure::writeOutStrings( - PortProxy* proxy, Addr addr) + PortProxy& proxy, Addr addr) { std::vector<std::string>::iterator it; Addr offset = 0; @@ -103,16 +103,16 @@ X86ISA::SMBios::SMBiosStructure::writeOutStrings( // If there are string fields but none of them are used, that's a // special case which is handled by this if. if (strings.size() == 0 && stringFields) { - proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); + proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); offset++; } else { for (it = strings.begin(); it != strings.end(); it++) { - proxy->writeBlob(addr + offset, + proxy.writeBlob(addr + offset, (uint8_t *)it->c_str(), it->length() + 1); offset += it->length() + 1; } } - proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); + proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); } int @@ -172,30 +172,30 @@ X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) : } uint16_t -X86ISA::SMBios::BiosInformation::writeOut(PortProxy* proxy, Addr addr) +X86ISA::SMBios::BiosInformation::writeOut(PortProxy& proxy, Addr addr) { uint8_t size = SMBiosStructure::writeOut(proxy, addr); - proxy->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1); - proxy->writeBlob(addr + 0x5, (uint8_t *)(&version), 1); + proxy.writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1); + proxy.writeBlob(addr + 0x5, (uint8_t *)(&version), 1); uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment); - proxy->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2); + proxy.writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2); - proxy->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1); - proxy->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1); + proxy.writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1); + proxy.writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1); uint64_t characteristicsGuest = X86ISA::htog(characteristics); - proxy->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8); + proxy.writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8); uint16_t characteristicExtBytesGuest = X86ISA::htog(characteristicExtBytes); - proxy->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2); + proxy.writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2); - proxy->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1); - proxy->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1); - proxy->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1); - proxy->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1); + proxy.writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1); + proxy.writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1); + proxy.writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1); + proxy.writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1); writeOutStrings(proxy, addr + getLength()); @@ -214,7 +214,7 @@ X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) : } void -X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, +X86ISA::SMBios::SMBiosTable::writeOut(PortProxy& proxy, Addr addr, Addr &headerSize, Addr &structSize) { headerSize = 0x1F; @@ -224,26 +224,26 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, */ uint8_t mainChecksum = 0; - proxy->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4); + proxy.writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4); for (int i = 0; i < 4; i++) mainChecksum += smbiosHeader.anchorString[i]; // The checksum goes here, but we're figuring it out as we go. - proxy->writeBlob(addr + 0x5, + proxy.writeBlob(addr + 0x5, (uint8_t *)(&smbiosHeader.entryPointLength), 1); mainChecksum += smbiosHeader.entryPointLength; - proxy->writeBlob(addr + 0x6, + proxy.writeBlob(addr + 0x6, (uint8_t *)(&smbiosHeader.majorVersion), 1); mainChecksum += smbiosHeader.majorVersion; - proxy->writeBlob(addr + 0x7, + proxy.writeBlob(addr + 0x7, (uint8_t *)(&smbiosHeader.minorVersion), 1); mainChecksum += smbiosHeader.minorVersion; // Maximum structure size goes here, but we'll figure it out later. - proxy->writeBlob(addr + 0xA, + proxy.writeBlob(addr + 0xA, (uint8_t *)(&smbiosHeader.entryPointRevision), 1); mainChecksum += smbiosHeader.entryPointRevision; - proxy->writeBlob(addr + 0xB, + proxy.writeBlob(addr + 0xB, (uint8_t *)(&smbiosHeader.formattedArea), 5); for (int i = 0; i < 5; i++) mainChecksum += smbiosHeader.formattedArea[i]; @@ -253,7 +253,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, */ uint8_t intChecksum = 0; - proxy->writeBlob(addr + 0x10, + proxy.writeBlob(addr + 0x10, (uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5); for (int i = 0; i < 5; i++) intChecksum += smbiosHeader.intermediateHeader.anchorString[i]; @@ -263,20 +263,20 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, uint32_t tableAddrGuest = X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr); - proxy->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4); + proxy.writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4); for (int i = 0; i < 4; i++) { intChecksum += tableAddrGuest; tableAddrGuest >>= 8; } uint16_t numStructs = X86ISA::gtoh(structures.size()); - proxy->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2); + proxy.writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2); for (int i = 0; i < 2; i++) { intChecksum += numStructs; numStructs >>= 8; } - proxy->writeBlob(addr + 0x1E, + proxy.writeBlob(addr + 0x1E, (uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision), 1); intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision; @@ -303,7 +303,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, */ maxSize = X86ISA::htog(maxSize); - proxy->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2); + proxy.writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2); for (int i = 0; i < 2; i++) { mainChecksum += maxSize; maxSize >>= 8; @@ -311,7 +311,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, // Set the checksum mainChecksum = -mainChecksum; - proxy->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1); + proxy.writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1); /* * Intermediate header @@ -319,14 +319,14 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, uint16_t tableSize = offset; tableSize = X86ISA::htog(tableSize); - proxy->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2); + proxy.writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2); for (int i = 0; i < 2; i++) { intChecksum += tableSize; tableSize >>= 8; } intChecksum = -intChecksum; - proxy->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1); + proxy.writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1); } X86ISA::SMBios::BiosInformation * diff --git a/src/arch/x86/bios/smbios.hh b/src/arch/x86/bios/smbios.hh index 805b03fbb..4b0a61190 100644 --- a/src/arch/x86/bios/smbios.hh +++ b/src/arch/x86/bios/smbios.hh @@ -89,7 +89,7 @@ class SMBiosStructure : public SimObject return 4; } - virtual uint16_t writeOut(PortProxy* proxy, Addr addr); + virtual uint16_t writeOut(PortProxy& proxy, Addr addr); protected: bool stringFields; @@ -98,7 +98,7 @@ class SMBiosStructure : public SimObject std::vector<std::string> strings; - void writeOutStrings(PortProxy* proxy, Addr addr); + void writeOutStrings(PortProxy& proxy, Addr addr); int getStringLength(); @@ -145,7 +145,7 @@ class BiosInformation : public SMBiosStructure BiosInformation(Params * p); uint8_t getLength() { return 0x18; } - uint16_t writeOut(PortProxy* proxy, Addr addr); + uint16_t writeOut(PortProxy& proxy, Addr addr); }; class SMBiosTable : public SimObject @@ -223,7 +223,7 @@ class SMBiosTable : public SimObject smbiosHeader.intermediateHeader.tableAddr = addr; } - void writeOut(PortProxy* proxy, Addr addr, + void writeOut(PortProxy& proxy, Addr addr, Addr &headerSize, Addr &structSize); }; diff --git a/src/arch/x86/linux/syscalls.cc b/src/arch/x86/linux/syscalls.cc index c6faf391b..b016a380a 100644 --- a/src/arch/x86/linux/syscalls.cc +++ b/src/arch/x86/linux/syscalls.cc @@ -81,7 +81,7 @@ archPrctlFunc(SyscallDesc *desc, int callnum, LiveProcess *process, int code = process->getSyscallArg(tc, index); uint64_t addr = process->getSyscallArg(tc, index); uint64_t fsBase, gsBase; - SETranslatingPortProxy* p = tc->getMemProxy(); + SETranslatingPortProxy &p = tc->getMemProxy(); switch(code) { //Each of these valid options should actually check addr. @@ -91,7 +91,7 @@ archPrctlFunc(SyscallDesc *desc, int callnum, LiveProcess *process, return 0; case GetFS: fsBase = tc->readMiscRegNoEffect(MISCREG_FS_BASE); - p->write(addr, fsBase); + p.write(addr, fsBase); return 0; case SetGS: tc->setMiscRegNoEffect(MISCREG_GS_BASE, addr); @@ -99,7 +99,7 @@ archPrctlFunc(SyscallDesc *desc, int callnum, LiveProcess *process, return 0; case GetGS: gsBase = tc->readMiscRegNoEffect(MISCREG_GS_BASE); - p->write(addr, gsBase); + p.write(addr, gsBase); return 0; default: return -EINVAL; diff --git a/src/arch/x86/linux/system.cc b/src/arch/x86/linux/system.cc index a933868d1..f473af40e 100644 --- a/src/arch/x86/linux/system.cc +++ b/src/arch/x86/linux/system.cc @@ -67,9 +67,6 @@ LinuxX86System::initState() // The location of the real mode data structure. const Addr realModeData = 0x90200; - // A port proxy to write to memory. - PortProxy* physProxy = threadContexts[0]->getPhysProxy(); - /* * Deal with the command line stuff. */ @@ -82,15 +79,15 @@ LinuxX86System::initState() if (commandLine.length() + 1 > realModeData - commandLineBuff) panic("Command line \"%s\" is longer than %d characters.\n", commandLine, realModeData - commandLineBuff - 1); - physProxy->writeBlob(commandLineBuff, - (uint8_t *)commandLine.c_str(), commandLine.length() + 1); + physProxy.writeBlob(commandLineBuff, (uint8_t *)commandLine.c_str(), + commandLine.length() + 1); // Generate a pointer of the right size and endianness to put into // commandLinePointer. uint32_t guestCommandLineBuff = X86ISA::htog((uint32_t)commandLineBuff); - physProxy->writeBlob(commandLinePointer, - (uint8_t *)&guestCommandLineBuff, sizeof(guestCommandLineBuff)); + physProxy.writeBlob(commandLinePointer, (uint8_t *)&guestCommandLineBuff, + sizeof(guestCommandLineBuff)); /* * Screen Info. @@ -127,7 +124,7 @@ LinuxX86System::initState() // A pointer to the buffer for E820 entries. const Addr e820MapPointer = realModeData + 0x2d0; - e820Table->writeTo(getSystemPort(), e820MapNrPointer, e820MapPointer); + e820Table->writeTo(physProxy, e820MapNrPointer, e820MapPointer); /* * Pass the location of the real mode data structure to the kernel diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 32fc8ca70..088a0661c 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -172,7 +172,7 @@ X86_64LiveProcess::initState() 0x0f,0x05, // syscall 0xc3 // retq }; - initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset, + initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset, vtimeBlob, sizeof(vtimeBlob)); uint8_t vgettimeofdayBlob[] = { @@ -180,7 +180,7 @@ X86_64LiveProcess::initState() 0x0f,0x05, // syscall 0xc3 // retq }; - initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset, + initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset, vgettimeofdayBlob, sizeof(vgettimeofdayBlob)); for (int i = 0; i < contextIds.size(); i++) { @@ -269,7 +269,7 @@ I386LiveProcess::initState() assert(_gdtSize % sizeof(zero) == 0); for (Addr gdtCurrent = _gdtStart; gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) { - initVirtMem->write(gdtCurrent, zero); + initVirtMem.write(gdtCurrent, zero); } // Set up the vsyscall page for this process. @@ -281,7 +281,7 @@ I386LiveProcess::initState() 0x89, 0xe5, // mov %esp, %ebp 0x0f, 0x34 // sysenter }; - initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset, + initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset, vsyscallBlob, sizeof(vsyscallBlob)); uint8_t vsysexitBlob[] = { @@ -290,7 +290,7 @@ I386LiveProcess::initState() 0x59, // pop %ecx 0xc3 // ret }; - initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset, + initVirtMem.writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset, vsysexitBlob, sizeof(vsysexitBlob)); for (int i = 0; i < contextIds.size(); i++) { @@ -608,11 +608,11 @@ X86LiveProcess::argsInit(int pageSize, //Write out the sentry void * IntType sentry_NULL = 0; - initVirtMem->writeBlob(sentry_base, + initVirtMem.writeBlob(sentry_base, (uint8_t*)&sentry_NULL, sentry_size); //Write the file name - initVirtMem->writeString(file_name_base, filename.c_str()); + initVirtMem.writeString(file_name_base, filename.c_str()); //Fix up the aux vectors which point to data assert(auxv[auxv.size() - 3].a_type == M5_AT_RANDOM); @@ -625,22 +625,22 @@ X86LiveProcess::argsInit(int pageSize, //Copy the aux stuff for(int x = 0; x < auxv.size(); x++) { - initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, + initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, (uint8_t*)&(auxv[x].a_type), intSize); - initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, + initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, (uint8_t*)&(auxv[x].a_val), intSize); } //Write out the terminating zeroed auxilliary vector const uint64_t zero = 0; - initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), + initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(), (uint8_t*)&zero, 2 * intSize); - initVirtMem->writeString(aux_data_base, platform.c_str()); + initVirtMem.writeString(aux_data_base, platform.c_str()); copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); - initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); + initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); ThreadContext *tc = system->getThreadContext(contextIds[0]); //Set the stack pointer register diff --git a/src/arch/x86/stacktrace.cc b/src/arch/x86/stacktrace.cc index e3d30d5cd..636f74123 100644 --- a/src/arch/x86/stacktrace.cc +++ b/src/arch/x86/stacktrace.cc @@ -48,29 +48,27 @@ namespace X86ISA { Addr addr = 0; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr)) panic("thread info not compiled into kernel\n"); - thread_info_size = vp->readGtoH<int32_t>(addr); + thread_info_size = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr)) panic("thread info not compiled into kernel\n"); - task_struct_size = vp->readGtoH<int32_t>(addr); + task_struct_size = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr)) panic("thread info not compiled into kernel\n"); - task_off = vp->readGtoH<int32_t>(addr); + task_off = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr)) panic("thread info not compiled into kernel\n"); - pid_off = vp->readGtoH<int32_t>(addr); + pid_off = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr)) panic("thread info not compiled into kernel\n"); - name_off = vp->readGtoH<int32_t>(addr); + name_off = vp.readGtoH<int32_t>(addr); } Addr @@ -82,10 +80,8 @@ namespace X86ISA Addr tsk; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); - tsk = vp->readGtoH<Addr>(base + task_off); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + tsk = vp.readGtoH<Addr>(base + task_off); return tsk; } @@ -99,10 +95,8 @@ namespace X86ISA uint16_t pd; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); - pd = vp->readGtoH<uint16_t>(task + pid_off); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); + pd = vp.readGtoH<uint16_t>(task + pid_off); return pd; } diff --git a/src/arch/x86/system.cc b/src/arch/x86/system.cc index ca13fd5ce..effe1e994 100644 --- a/src/arch/x86/system.cc +++ b/src/arch/x86/system.cc @@ -138,17 +138,14 @@ X86System::initState() const int PDPTBits = 9; const int PDTBits = 9; - // Get a port proxy to write the page tables and descriptor tables. - PortProxy* physProxy = tc->getPhysProxy(); - /* * Set up the gdt. */ uint8_t numGDTEntries = 0; // Place holder at selector 0 uint64_t nullDescriptor = 0; - physProxy->writeBlob(GDTBase + numGDTEntries * 8, - (uint8_t *)(&nullDescriptor), 8); + physProxy.writeBlob(GDTBase + numGDTEntries * 8, + (uint8_t *)(&nullDescriptor), 8); numGDTEntries++; //64 bit code segment @@ -169,8 +166,8 @@ X86System::initState() //it's beginning in memory and it's actual data, we'll use an //intermediary. uint64_t csDescVal = csDesc; - physProxy->writeBlob(GDTBase + numGDTEntries * 8, - (uint8_t *)(&csDescVal), 8); + physProxy.writeBlob(GDTBase + numGDTEntries * 8, + (uint8_t *)(&csDescVal), 8); numGDTEntries++; @@ -192,8 +189,8 @@ X86System::initState() dsDesc.limitHigh = 0xF; dsDesc.limitLow = 0xFF; uint64_t dsDescVal = dsDesc; - physProxy->writeBlob(GDTBase + numGDTEntries * 8, - (uint8_t *)(&dsDescVal), 8); + physProxy.writeBlob(GDTBase + numGDTEntries * 8, + (uint8_t *)(&dsDescVal), 8); numGDTEntries++; @@ -220,8 +217,8 @@ X86System::initState() tssDesc.limitHigh = 0xF; tssDesc.limitLow = 0xFF; uint64_t tssDescVal = tssDesc; - physProxy->writeBlob(GDTBase + numGDTEntries * 8, - (uint8_t *)(&tssDescVal), 8); + physProxy.writeBlob(GDTBase + numGDTEntries * 8, + (uint8_t *)(&tssDescVal), 8); numGDTEntries++; @@ -250,25 +247,25 @@ X86System::initState() // read/write, user, not present uint64_t pml4e = X86ISA::htog(0x6); for (int offset = 0; offset < (1 << PML4Bits) * 8; offset += 8) { - physProxy->writeBlob(PageMapLevel4 + offset, (uint8_t *)(&pml4e), 8); + physProxy.writeBlob(PageMapLevel4 + offset, (uint8_t *)(&pml4e), 8); } // Point to the only PDPT pml4e = X86ISA::htog(0x7 | PageDirPtrTable); - physProxy->writeBlob(PageMapLevel4, (uint8_t *)(&pml4e), 8); + physProxy.writeBlob(PageMapLevel4, (uint8_t *)(&pml4e), 8); // Page Directory Pointer Table // read/write, user, not present uint64_t pdpe = X86ISA::htog(0x6); for (int offset = 0; offset < (1 << PDPTBits) * 8; offset += 8) { - physProxy->writeBlob(PageDirPtrTable + offset, - (uint8_t *)(&pdpe), 8); + physProxy.writeBlob(PageDirPtrTable + offset, + (uint8_t *)(&pdpe), 8); } // Point to the PDTs for (int table = 0; table < NumPDTs; table++) { pdpe = X86ISA::htog(0x7 | PageDirTable[table]); - physProxy->writeBlob(PageDirPtrTable + table * 8, - (uint8_t *)(&pdpe), 8); + physProxy.writeBlob(PageDirPtrTable + table * 8, + (uint8_t *)(&pdpe), 8); } // Page Directory Tables @@ -279,8 +276,8 @@ X86System::initState() for (int offset = 0; offset < (1 << PDTBits) * 8; offset += 8) { // read/write, user, present, 4MB uint64_t pdte = X86ISA::htog(0x87 | base); - physProxy->writeBlob(PageDirTable[table] + offset, - (uint8_t *)(&pdte), 8); + physProxy.writeBlob(PageDirTable[table] + offset, + (uint8_t *)(&pdte), 8); base += pageSize; } } @@ -342,9 +339,6 @@ void X86System::writeOutSMBiosTable(Addr header, Addr &headerSize, Addr &structSize, Addr table) { - // Get a port proxy to write the table and header to memory. - PortProxy* physProxy = threadContexts[0]->getPhysProxy(); - // If the table location isn't specified, just put it after the header. // The header size as of the 2.5 SMBios specification is 0x1F bytes if (!table) @@ -363,9 +357,6 @@ void X86System::writeOutMPTable(Addr fp, Addr &fpSize, Addr &tableSize, Addr table) { - // Get a port proxy to write the table and header to memory. - PortProxy* physProxy = threadContexts[0]->getPhysProxy(); - // If the table location isn't specified and it exists, just put // it after the floating pointer. The fp size as of the 1.4 Intel MP // specification is 0x10 bytes. |