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-rw-r--r--src/arch/arm/insts/misc.cc2
-rw-r--r--src/arch/arm/insts/misc64.cc2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc
index d4a2ba2d2..ef78c236e 100644
--- a/src/arch/arm/insts/misc.cc
+++ b/src/arch/arm/insts/misc.cc
@@ -324,5 +324,5 @@ RegImmRegShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
std::string
UnknownOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
- return csprintf("%-10s (inst %#08x)", "unknown", machInst);
+ return csprintf("%-10s (inst %#08x)", "unknown", machInst & mask(32));
}
diff --git a/src/arch/arm/insts/misc64.cc b/src/arch/arm/insts/misc64.cc
index edc916dbb..5bdf6cb94 100644
--- a/src/arch/arm/insts/misc64.cc
+++ b/src/arch/arm/insts/misc64.cc
@@ -78,7 +78,7 @@ RegRegRegImmOp64::generateDisassembly(
std::string
UnknownOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
- return csprintf("%-10s (inst %#08x)", "unknown", machInst);
+ return csprintf("%-10s (inst %#08x)", "unknown", machInst & mask(32));
}
std::string