diff options
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/alpha/process.cc | 9 | ||||
-rw-r--r-- | src/arch/arm/process.cc | 10 | ||||
-rw-r--r-- | src/arch/mips/process.cc | 9 | ||||
-rw-r--r-- | src/arch/power/process.cc | 7 | ||||
-rw-r--r-- | src/arch/sparc/process.cc | 13 | ||||
-rw-r--r-- | src/arch/x86/process.cc | 4 |
6 files changed, 23 insertions, 29 deletions
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc index 07208fb29..8cc83b0fd 100644 --- a/src/arch/alpha/process.cc +++ b/src/arch/alpha/process.cc @@ -220,19 +220,18 @@ AlphaLiveProcess::setSyscallArg(ThreadContext *tc, } void -AlphaLiveProcess::setSyscallReturn(ThreadContext *tc, - SyscallReturn return_value) +AlphaLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) { // check for error condition. Alpha syscall convention is to // indicate success/failure in reg a3 (r19) and put the // return value itself in the standard return value reg (v0). - if (return_value.successful()) { + if (sysret.successful()) { // no error tc->setIntReg(SyscallSuccessReg, 0); - tc->setIntReg(ReturnValueReg, return_value.value()); + tc->setIntReg(ReturnValueReg, sysret.returnValue()); } else { // got an error, return details tc->setIntReg(SyscallSuccessReg, (IntReg)-1); - tc->setIntReg(ReturnValueReg, -return_value.value()); + tc->setIntReg(ReturnValueReg, sysret.errnoValue()); } } diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc index dd23a5e21..175382b43 100644 --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -454,15 +454,13 @@ ArmLiveProcess64::setSyscallArg(ThreadContext *tc, } void -ArmLiveProcess32::setSyscallReturn(ThreadContext *tc, - SyscallReturn return_value) +ArmLiveProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) { - tc->setIntReg(ReturnValueReg, return_value.value()); + tc->setIntReg(ReturnValueReg, sysret.encodedValue()); } void -ArmLiveProcess64::setSyscallReturn(ThreadContext *tc, - SyscallReturn return_value) +ArmLiveProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) { - tc->setIntReg(ReturnValueReg, return_value.value()); + tc->setIntReg(ReturnValueReg, sysret.encodedValue()); } diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc index 4ed9a7b39..f84c5cc4a 100644 --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -197,16 +197,15 @@ MipsLiveProcess::setSyscallArg(ThreadContext *tc, } void -MipsLiveProcess::setSyscallReturn(ThreadContext *tc, - SyscallReturn return_value) +MipsLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) { - if (return_value.successful()) { + if (sysret.successful()) { // no error tc->setIntReg(SyscallSuccessReg, 0); - tc->setIntReg(ReturnValueReg, return_value.value()); + tc->setIntReg(ReturnValueReg, sysret.returnValue()); } else { // got an error, return details tc->setIntReg(SyscallSuccessReg, (IntReg) -1); - tc->setIntReg(ReturnValueReg, -return_value.value()); + tc->setIntReg(ReturnValueReg, sysret.errnoValue()); } } diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc index 3c5d1e8b4..175a84f6b 100644 --- a/src/arch/power/process.cc +++ b/src/arch/power/process.cc @@ -277,15 +277,14 @@ PowerLiveProcess::setSyscallArg(ThreadContext *tc, } void -PowerLiveProcess::setSyscallReturn(ThreadContext *tc, - SyscallReturn return_value) +PowerLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) { Cr cr = tc->readIntReg(INTREG_CR); - if (return_value.successful()) { + if (sysret.successful()) { cr.cr0.so = 0; } else { cr.cr0.so = 1; } tc->setIntReg(INTREG_CR, cr); - tc->setIntReg(ReturnValueReg, return_value.value()); + tc->setIntReg(ReturnValueReg, sysret.encodedValue()); } diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index 456b8b94a..06b0d18b3 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -532,26 +532,25 @@ Sparc64LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val) } void -SparcLiveProcess::setSyscallReturn(ThreadContext *tc, - SyscallReturn return_value) +SparcLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) { // check for error condition. SPARC syscall convention is to // indicate success/failure in reg the carry bit of the ccr // and put the return value itself in the standard return value reg (). PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE); - if (return_value.successful()) { + if (sysret.successful()) { // no error, clear XCC.C tc->setIntReg(NumIntArchRegs + 2, - tc->readIntReg(NumIntArchRegs + 2) & 0xEE); - IntReg val = return_value.value(); + tc->readIntReg(NumIntArchRegs + 2) & 0xEE); + IntReg val = sysret.returnValue(); if (pstate.am) val = bits(val, 31, 0); tc->setIntReg(ReturnValueReg, val); } else { // got an error, set XCC.C tc->setIntReg(NumIntArchRegs + 2, - tc->readIntReg(NumIntArchRegs + 2) | 0x11); - IntReg val = -return_value.value(); + tc->readIntReg(NumIntArchRegs + 2) | 0x11); + IntReg val = sysret.errnoValue(); if (pstate.am) val = bits(val, 31, 0); tc->setIntReg(ReturnValueReg, val); diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index bf7669cdf..95a7f9998 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -678,9 +678,9 @@ I386LiveProcess::argsInit(int intSize, int pageSize) } void -X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value) +X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn retval) { - tc->setIntReg(INTREG_RAX, return_value.value()); + tc->setIntReg(INTREG_RAX, retval.encodedValue()); } X86ISA::IntReg |