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-rw-r--r--src/arch/x86/insts/microldstop.cc6
-rw-r--r--src/arch/x86/insts/microregop.cc10
-rw-r--r--src/arch/x86/insts/static_inst.cc56
-rw-r--r--src/arch/x86/insts/static_inst.hh6
-rw-r--r--src/arch/x86/isa/microops/limmop.isa21
5 files changed, 55 insertions, 44 deletions
diff --git a/src/arch/x86/insts/microldstop.cc b/src/arch/x86/insts/microldstop.cc
index 330a1b7bd..8a52ad932 100644
--- a/src/arch/x86/insts/microldstop.cc
+++ b/src/arch/x86/insts/microldstop.cc
@@ -66,13 +66,13 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, data);
+ printReg(response, data, dataSize);
response << ", ";
printSegment(response, segment);
ccprintf(response, ":[%d*", scale);
- printReg(response, index);
+ printReg(response, index, addressSize);
response << " + ";
- printReg(response, base);
+ printReg(response, base, addressSize);
ccprintf(response, " + %#x]", disp);
return response.str();
}
diff --git a/src/arch/x86/insts/microregop.cc b/src/arch/x86/insts/microregop.cc
index 3c60d7212..f4559d95f 100644
--- a/src/arch/x86/insts/microregop.cc
+++ b/src/arch/x86/insts/microregop.cc
@@ -165,11 +165,11 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, dest);
+ printReg(response, dest, dataSize);
response << ", ";
- printReg(response, src1);
+ printReg(response, src1, dataSize);
response << ", ";
- printReg(response, src2);
+ printReg(response, src2, dataSize);
return response.str();
}
@@ -179,9 +179,9 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, dest);
+ printReg(response, dest, dataSize);
response << ", ";
- printReg(response, src1);
+ printReg(response, src1, dataSize);
ccprintf(response, ", %#x", imm8);
return response.str();
}
diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc
index bf84c6e2b..9b2f81e49 100644
--- a/src/arch/x86/insts/static_inst.cc
+++ b/src/arch/x86/insts/static_inst.cc
@@ -99,76 +99,84 @@ namespace X86ISA
}
void
- X86StaticInst::printSrcReg(std::ostream &os, int reg) const
+ X86StaticInst::printSrcReg(std::ostream &os, int reg, int size) const
{
if(_numSrcRegs > reg)
- printReg(os, _srcRegIdx[reg]);
+ printReg(os, _srcRegIdx[reg], size);
}
void
- X86StaticInst::printDestReg(std::ostream &os, int reg) const
+ X86StaticInst::printDestReg(std::ostream &os, int reg, int size) const
{
if(_numDestRegs > reg)
- printReg(os, _destRegIdx[reg]);
+ printReg(os, _destRegIdx[reg], size);
}
void
- X86StaticInst::printReg(std::ostream &os, int reg) const
+ X86StaticInst::printReg(std::ostream &os, int reg, int size) const
{
+ assert(size == 1 || size == 2 || size == 4 || size == 8);
+ static const char * abcdFormats[9] =
+ {"", "%sl", "%sx", "", "e%sx", "", "", "", "r%sx"};
+ static const char * piFormats[9] =
+ {"", "%sl", "%s", "", "e%s", "", "", "", "r%s"};
+ static const char * longFormats[9] =
+ {"", "r%sb", "r%sw", "", "r%sd", "", "", "", "r%s"};
+ static const char * microFormats[9] =
+ {"", "t%db", "t%dw", "", "t%dd", "", "", "", "t%d"};
+
if (reg < FP_Base_DepTag) {
- //FIXME These should print differently depending on the
- //mode etc, but for now this will get the point across
switch (reg) {
case INTREG_RAX:
- ccprintf(os, "rax");
+ ccprintf(os, abcdFormats[size], "a");
break;
case INTREG_RBX:
- ccprintf(os, "rbx");
+ ccprintf(os, abcdFormats[size], "b");
break;
case INTREG_RCX:
- ccprintf(os, "rcx");
+ ccprintf(os, abcdFormats[size], "c");
break;
case INTREG_RDX:
- ccprintf(os, "rdx");
+ ccprintf(os, abcdFormats[size], "d");
break;
case INTREG_RSP:
- ccprintf(os, "rsp");
+ ccprintf(os, piFormats[size], "sp");
break;
case INTREG_RBP:
- ccprintf(os, "rbp");
+ ccprintf(os, piFormats[size], "bp");
break;
case INTREG_RSI:
- ccprintf(os, "rsi");
+ ccprintf(os, piFormats[size], "si");
break;
case INTREG_RDI:
- ccprintf(os, "rdi");
+ ccprintf(os, piFormats[size], "di");
break;
case INTREG_R8W:
- ccprintf(os, "r8");
+ ccprintf(os, longFormats[size], "8");
break;
case INTREG_R9W:
- ccprintf(os, "r9");
+ ccprintf(os, longFormats[size], "9");
break;
case INTREG_R10W:
- ccprintf(os, "r10");
+ ccprintf(os, longFormats[size], "10");
break;
case INTREG_R11W:
- ccprintf(os, "r11");
+ ccprintf(os, longFormats[size], "11");
break;
case INTREG_R12W:
- ccprintf(os, "r12");
+ ccprintf(os, longFormats[size], "12");
break;
case INTREG_R13W:
- ccprintf(os, "r13");
+ ccprintf(os, longFormats[size], "13");
break;
case INTREG_R14W:
- ccprintf(os, "r14");
+ ccprintf(os, longFormats[size], "14");
break;
case INTREG_R15W:
- ccprintf(os, "r15");
+ ccprintf(os, longFormats[size], "15");
break;
default:
- ccprintf(os, "t%d", reg - NUM_INTREGS);
+ ccprintf(os, microFormats[size], reg - NUM_INTREGS);
}
} else if (reg < Ctrl_Base_DepTag) {
ccprintf(os, "%%f%d", reg - FP_Base_DepTag);
diff --git a/src/arch/x86/insts/static_inst.hh b/src/arch/x86/insts/static_inst.hh
index 3e9dbf26e..c39c2956e 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -85,9 +85,9 @@ namespace X86ISA
void printSegment(std::ostream &os, int segment) const;
- void printReg(std::ostream &os, int reg) const;
- void printSrcReg(std::ostream &os, int reg) const;
- void printDestReg(std::ostream &os, int reg) const;
+ void printReg(std::ostream &os, int reg, int size) const;
+ void printSrcReg(std::ostream &os, int reg, int size) const;
+ void printDestReg(std::ostream &os, int reg, int size) const;
inline uint64_t merge(uint64_t into, uint64_t val, int size) const
{
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index 177a914ae..37180d7fa 100644
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -77,6 +77,7 @@ def template MicroLimmOpDeclare {{
protected:
const RegIndex dest;
const uint64_t imm;
+ const uint8_t dataSize;
void buildMe();
std::string generateDisassembly(Addr pc,
@@ -86,11 +87,11 @@ def template MicroLimmOpDeclare {{
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
- RegIndex _dest, uint64_t _imm);
+ RegIndex _dest, uint64_t _imm, uint8_t _dataSize);
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
- RegIndex _dest, uint64_t _imm);
+ RegIndex _dest, uint64_t _imm, uint8_t _dataSize);
%(BasicExecDeclare)s
};
@@ -103,7 +104,7 @@ def template MicroLimmOpDisassembly {{
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
- printReg(response, dest);
+ printReg(response, dest, dataSize);
response << ", ";
ccprintf(response, "%#x", imm);
return response.str();
@@ -119,10 +120,10 @@ def template MicroLimmOpConstructor {{
inline %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
- RegIndex _dest, uint64_t _imm) :
+ RegIndex _dest, uint64_t _imm, uint8_t _dataSize) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
false, false, false, false, %(op_class)s),
- dest(_dest), imm(_imm)
+ dest(_dest), imm(_imm), dataSize(_dataSize)
{
buildMe();
}
@@ -130,10 +131,10 @@ def template MicroLimmOpConstructor {{
inline %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
- RegIndex _dest, uint64_t _imm) :
+ RegIndex _dest, uint64_t _imm, uint8_t _dataSize) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
isMicro, isDelayed, isFirst, isLast, %(op_class)s),
- dest(_dest), imm(_imm)
+ dest(_dest), imm(_imm), dataSize(_dataSize)
{
buildMe();
}
@@ -146,14 +147,16 @@ let {{
self.mnemonic = "limm"
self.dest = dest
self.imm = imm
+ self.dataSize = "env.dataSize"
def getAllocator(self, *microFlags):
allocator = '''new %(class_name)s(machInst, mnemonic
- %(flags)s, %(dest)s, %(imm)s)''' % {
+ %(flags)s, %(dest)s, %(imm)s, %(dataSize)s)''' % {
"class_name" : self.className,
"mnemonic" : self.mnemonic,
"flags" : self.microFlagsText(microFlags),
- "dest" : self.dest, "imm" : self.imm }
+ "dest" : self.dest, "imm" : self.imm,
+ "dataSize" : self.dataSize}
return allocator
microopClasses["limm"] = LimmOp
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 05:30:16 +0000