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-rw-r--r--src/arch/x86/isa/microasm.isa2
-rw-r--r--src/arch/x86/isa/microops/regop.isa7
2 files changed, 7 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index 75e1dc524..29ec6dc94 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -85,7 +85,7 @@ let {{
assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
# Add in symbols for the various checks of segment selectors.
- for check in ("NoCheck", "CSCheck", "CallGateCheck",
+ for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
"SSCheck", "IretCheck", "IntCSCheck"):
assembler.symbols[check] = "Seg%s" % check
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index b7883b2e2..0d019729f 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -233,7 +233,7 @@ output header {{
uint64_t &quotient, uint64_t &remainder);
enum SegmentSelectorCheck {
- SegNoCheck, SegCSCheck, SegCallGateCheck,
+ SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
SegSSCheck, SegIretCheck, SegIntCSCheck
};
}};
@@ -1041,6 +1041,11 @@ let {{
panic("CS checks for far calls/jumps through call gates"
"not implemented.\\n");
break;
+ case SegIntGateCheck:
+ if (desc.dpl < m5reg.cpl) {
+ return new GeneralProtection((uint16_t)selector);
+ }
+ break;
case SegSSCheck:
if (selector.si || selector.ti) {
if (!desc.p) {