9 files changed, 17 insertions, 23 deletions
diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc
index aa120686c..8e742c38b 100644
--- a/src/arch/alpha/remote_gdb.cc
+++ b/src/arch/alpha/remote_gdb.cc
@@ -166,7 +166,7 @@ RemoteGDB::acc(Addr va, size_t len)
 
     do  {
         if (IsK0Seg(va)) {
-            if (va < (K0SegBase + pmem->size())) {
+            if (va < (K0SegBase + system->memSize())) {
                 DPRINTF(GDBAcc, "acc:   Mapping is valid  K0SEG <= "
                         "%#x < K0SEG + size\n", va);
                 return true;
diff --git a/src/arch/alpha/remote_gdb.hh b/src/arch/alpha/remote_gdb.hh
index 7223fea55..d9c124c72 100644
--- a/src/arch/alpha/remote_gdb.hh
+++ b/src/arch/alpha/remote_gdb.hh
@@ -42,7 +42,6 @@
 
 class System;
 class ThreadContext;
-class PhysicalMemory;
 
 namespace AlphaISA {
 
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index e744c026c..f4aedaf98 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -56,8 +56,6 @@ class ArmSystem(System):
     # 0x0 Revision
     midr_regval = Param.UInt32(0x350fc000, "MIDR value")
     boot_loader = Param.String("", "File that contains the boot loader code if any")
-    boot_loader_mem = Param.PhysicalMemory(NULL,
-                          "Memory object that boot loader is to be loaded into")
     gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface")
     flags_addr = Param.Addr(0, "Address of the flags register for MP booting")
 
@@ -67,5 +65,3 @@ class LinuxArmSystem(ArmSystem):
     machine_type = Param.ArmMachineType('RealView_PBX',
         "Machine id from http://www.arm.linux.org.uk/developer/machines/")
     atags_addr = Param.Addr(0x100, "Address where default atags structure should be written")
-
-
diff --git a/src/arch/arm/linux/system.cc b/src/arch/arm/linux/system.cc
index 64bda4b4d..0d9e73a53 100644
--- a/src/arch/arm/linux/system.cc
+++ b/src/arch/arm/linux/system.cc
@@ -125,9 +125,14 @@ LinuxArmSystem::initState()
     ac->pagesize(8192);
     ac->rootdev(0);
 
+    AddrRangeList atagRanges = physmem.getConfAddrRanges();
+    if (atagRanges.size() != 1) {
+        fatal("Expected a single ATAG memory entry but got %d\n",
+              atagRanges.size());
+    }
     AtagMem *am = new AtagMem;
-    am->memSize(params()->physmem->size());
-    am->memStart(params()->physmem->start());
+    am->memSize(atagRanges.begin()->size());
+    am->memStart(atagRanges.begin()->start);
 
     AtagCmdline *ad = new AtagCmdline;
     ad->cmdline(params()->boot_osflags);
diff --git a/src/arch/arm/remote_gdb.hh b/src/arch/arm/remote_gdb.hh
index 9ff93b8e6..b75d921fb 100644
--- a/src/arch/arm/remote_gdb.hh
+++ b/src/arch/arm/remote_gdb.hh
@@ -37,7 +37,6 @@
 
 class System;
 class ThreadContext;
-class PhysicalMemory;
 
 namespace ArmISA
 {
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 7fbabafcb..f6c4ad783 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -55,9 +55,6 @@ using namespace Linux;
 ArmSystem::ArmSystem(Params *p)
     : System(p), bootldr(NULL)
 {
-    if ((p->boot_loader == "") != (p->boot_loader_mem == NULL))
-        fatal("If boot_loader is specifed, memory to load it must be also.\n");
-
     if (p->boot_loader != "") {
         bootldr = createObjectFile(p->boot_loader);
 
diff --git a/src/arch/mips/remote_gdb.hh b/src/arch/mips/remote_gdb.hh
index 18215ff8f..b9a227607 100644
--- a/src/arch/mips/remote_gdb.hh
+++ b/src/arch/mips/remote_gdb.hh
@@ -37,7 +37,6 @@
 
 class System;
 class ThreadContext;
-class PhysicalMemory;
 
 namespace MipsISA
 {
diff --git a/src/arch/sparc/SparcSystem.py b/src/arch/sparc/SparcSystem.py
index 92845235a..b0fddf311 100644
--- a/src/arch/sparc/SparcSystem.py
+++ b/src/arch/sparc/SparcSystem.py
@@ -28,7 +28,7 @@
 
 from m5.params import *
 
-from PhysicalMemory import *
+from SimpleMemory import SimpleMemory
 from System import System
 
 class SparcSystem(System):
@@ -38,20 +38,20 @@ class SparcSystem(System):
     _hypervisor_desc_base = 0x1f12080000
     _partition_desc_base = 0x1f12000000
     # ROM for OBP/Reset/Hypervisor
-    rom = Param.PhysicalMemory(
-        PhysicalMemory(range=AddrRange(_rom_base, size='8MB')),
+    rom = Param.SimpleMemory(
+        SimpleMemory(range=AddrRange(_rom_base, size='8MB')),
             "Memory to hold the ROM data")
     # nvram
-    nvram = Param.PhysicalMemory(
-        PhysicalMemory(range=AddrRange(_nvram_base, size='8kB')),
+    nvram = Param.SimpleMemory(
+        SimpleMemory(range=AddrRange(_nvram_base, size='8kB')),
         "Memory to hold the nvram data")
     # hypervisor description
-    hypervisor_desc = Param.PhysicalMemory(
-        PhysicalMemory(range=AddrRange(_hypervisor_desc_base, size='8kB')),
+    hypervisor_desc = Param.SimpleMemory(
+        SimpleMemory(range=AddrRange(_hypervisor_desc_base, size='8kB')),
         "Memory to hold the hypervisor description")
     # partition description
-    partition_desc = Param.PhysicalMemory(
-        PhysicalMemory(range=AddrRange(_partition_desc_base, size='8kB')),
+    partition_desc = Param.SimpleMemory(
+        SimpleMemory(range=AddrRange(_partition_desc_base, size='8kB')),
         "Memory to hold the partition description")
 
     reset_addr = Param.Addr(_rom_base, "Address to load ROM at")
diff --git a/src/arch/sparc/remote_gdb.hh b/src/arch/sparc/remote_gdb.hh
index 6ada8bdca..0176fd323 100644
--- a/src/arch/sparc/remote_gdb.hh
+++ b/src/arch/sparc/remote_gdb.hh
@@ -40,7 +40,6 @@
 
 class System;
 class ThreadContext;
-class PhysicalMemory;
 
 namespace SparcISA
 {