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-rw-r--r--src/arch/alpha/isa_traits.hh5
-rw-r--r--src/arch/mips/isa_traits.hh3
-rw-r--r--src/arch/sparc/isa_traits.hh3
3 files changed, 9 insertions, 2 deletions
diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index 72e38ae3e..4f439b8df 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -42,7 +42,6 @@ class StaticInstPtr;
namespace AlphaISA
{
-
using namespace LittleEndianGuest;
// These enumerate all the registers for dependence tracking.
@@ -60,12 +59,14 @@ namespace AlphaISA
StaticInstPtr decodeInst(ExtMachInst);
+ // Alpha Does NOT have a delay slot
+ #define ISA_HAS_DELAY_SLOT 0
+
const Addr PageShift = 13;
const Addr PageBytes = ULL(1) << PageShift;
const Addr PageMask = ~(PageBytes - 1);
const Addr PageOffset = PageBytes - 1;
-
#if FULL_SYSTEM
////////////////////////////////////////////////////////////////////////
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index fd484e315..f85fc5bea 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -47,6 +47,9 @@ namespace MipsISA
StaticInstPtr decodeInst(ExtMachInst);
+ // MIPS DOES a delay slot
+ #define ISA_HAS_DELAY_SLOT 1
+
const Addr PageShift = 13;
const Addr PageBytes = ULL(1) << PageShift;
const Addr PageMask = ~(PageBytes - 1);
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 7f830eb28..6d5aa4251 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -57,6 +57,9 @@ namespace SparcISA
//This makes sure the big endian versions of certain functions are used.
using namespace BigEndianGuest;
+ // Alpha Does NOT have a delay slot
+ #define ISA_HAS_DELAY_SLOT 1
+
//TODO this needs to be a SPARC Noop
// Alpha UNOP (ldq_u r31,0(r0))
const MachInst NoopMachInst = 0x2ffe0000;