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-rw-r--r--src/arch/alpha/faults.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/alpha/faults.cc b/src/arch/alpha/faults.cc
index e89cf5c64..e93e16711 100644
--- a/src/arch/alpha/faults.cc
+++ b/src/arch/alpha/faults.cc
@@ -144,7 +144,7 @@ DtbFault::invoke(ThreadContext *tc)
// read, like the EV5). The EV6 approach is cleaner and seems to
// work with EV5 PAL code, but not the other way around.
if (!tc->misspeculating() &&
- reqFlags.none(Request::VPTE|Request::NO_FAULT)) {
+ reqFlags.noneSet(Request::VPTE|Request::NO_FAULT)) {
// set VA register with faulting address
tc->setMiscRegNoEffect(IPR_VA, vaddr);