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-rw-r--r--src/arch/alpha/isa/decoder.isa2
-rw-r--r--src/arch/arm/isa/insts/m5ops.isa2
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa3
3 files changed, 3 insertions, 4 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index f0aa5a3fd..359c6b3b2 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -985,7 +985,7 @@ decode OPCODE default Unknown::unknown() {
PseudoInst::loadsymbol(xc->tcBase());
}}, No_OpClass, IsNonSpeculative);
0x30: initparam({{
- Ra = xc->tcBase()->getCpuPtr()->system->init_param;
+ Ra = PseudoInst::initParam(xc->tcBase());
}});
#endif
0x40: resetstats({{
diff --git a/src/arch/arm/isa/insts/m5ops.isa b/src/arch/arm/isa/insts/m5ops.isa
index 9bd1f4f01..e891a0a91 100644
--- a/src/arch/arm/isa/insts/m5ops.isa
+++ b/src/arch/arm/isa/insts/m5ops.isa
@@ -203,7 +203,7 @@ let {{
initparamCode = '''
#if FULL_SYSTEM
- Rt = xc->tcBase()->getCpuPtr()->system->init_param;
+ Rt = PseudoInst::initParam(xc->tcBase());
#endif
'''
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index 11cd6eeb1..f856f2d37 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -161,8 +161,7 @@
}}, IsNonSpeculative);
#if FULL_SYSTEM
0x30: m5initparam({{
- Rax = xc->tcBase()->getCpuPtr()->
- system->init_param;
+ Rax = PseudoInst::initParam(xc->tcBase());
}}, IsNonSpeculative);
0x31: m5loadsymbol({{
PseudoInst::loadsymbol(xc->tcBase());