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-rw-r--r--src/arch/alpha/pagetable.hh4
-rw-r--r--src/arch/generic/vec_pred_reg.hh1
-rw-r--r--src/arch/generic/vec_reg.hh1
3 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/alpha/pagetable.hh b/src/arch/alpha/pagetable.hh
index dc13d3790..e94aa4648 100644
--- a/src/arch/alpha/pagetable.hh
+++ b/src/arch/alpha/pagetable.hh
@@ -45,6 +45,7 @@ struct VAddr
Addr addr;
+ VAddr(const VAddr &) = default;
VAddr(Addr a) : addr(a) {}
operator Addr() const { return addr; }
const VAddr &operator=(Addr a) { addr = a; return *this; }
@@ -63,6 +64,7 @@ struct VAddr
struct PageTableEntry
{
+ PageTableEntry(const PageTableEntry &) = default;
PageTableEntry(uint64_t e) : entry(e) {}
uint64_t entry;
operator uint64_t() const { return entry; }
@@ -103,6 +105,8 @@ struct TlbEntry : public Serializable
bool valid; // valid page table entry
+ TlbEntry(const TlbEntry &) = default;
+
//Construct an entry that maps to physical address addr.
TlbEntry(Addr _asn, Addr _vaddr, Addr _paddr,
bool uncacheable, bool read_only)
diff --git a/src/arch/generic/vec_pred_reg.hh b/src/arch/generic/vec_pred_reg.hh
index 9ff9915ef..2f51d186b 100644
--- a/src/arch/generic/vec_pred_reg.hh
+++ b/src/arch/generic/vec_pred_reg.hh
@@ -248,6 +248,7 @@ class VecPredRegContainer
public:
VecPredRegContainer() {}
+ VecPredRegContainer(const VecPredRegContainer &) = default;
MyClass&
operator=(const MyClass& that)
diff --git a/src/arch/generic/vec_reg.hh b/src/arch/generic/vec_reg.hh
index aab307b42..948fec904 100644
--- a/src/arch/generic/vec_reg.hh
+++ b/src/arch/generic/vec_reg.hh
@@ -284,6 +284,7 @@ class VecRegContainer
public:
VecRegContainer() {}
+ VecRegContainer(const VecRegContainer &) = default;
/* This is required for de-serialisation. */
VecRegContainer(const std::vector<uint8_t>& that)
{