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-rw-r--r--src/arch/alpha/process.cc2
-rw-r--r--src/arch/arm/process.cc2
-rw-r--r--src/arch/mips/process.cc2
-rw-r--r--src/arch/power/process.cc2
-rw-r--r--src/arch/riscv/process.cc2
-rw-r--r--src/arch/sparc/process.cc2
-rw-r--r--src/arch/x86/process.cc2
7 files changed, 14 insertions, 0 deletions
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index 59cbebc1c..e266b92b2 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -78,6 +78,8 @@ AlphaProcess::argsInit(int intSize, int pageSize)
updateBias();
objFile->loadSegments(initVirtMem);
+ if (objFile->getInterpreter())
+ objFile->getInterpreter()->loadSegments(initVirtMem);
std::vector<AuxVector<uint64_t>> auxv;
diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc
index f98572690..ff3b92f48 100644
--- a/src/arch/arm/process.cc
+++ b/src/arch/arm/process.cc
@@ -271,6 +271,8 @@ ArmProcess::argsInit(int pageSize, IntRegIndex spIndex)
// load object file into target memory
objFile->loadSegments(initVirtMem);
+ if (objFile->getInterpreter())
+ objFile->getInterpreter()->loadSegments(initVirtMem);
//Setup the auxilliary vectors. These will already have endian conversion.
//Auxilliary vectors are loaded only for elf formatted executables.
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc
index 1808372d9..4c4b0e414 100644
--- a/src/arch/mips/process.cc
+++ b/src/arch/mips/process.cc
@@ -94,6 +94,8 @@ MipsProcess::argsInit(int pageSize)
// load object file into target memory
objFile->loadSegments(initVirtMem);
+ if (objFile->getInterpreter())
+ objFile->getInterpreter()->loadSegments(initVirtMem);
std::vector<AuxVector<IntType>> auxv;
diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc
index b391773ee..89b94b21f 100644
--- a/src/arch/power/process.cc
+++ b/src/arch/power/process.cc
@@ -100,6 +100,8 @@ PowerProcess::argsInit(int intSize, int pageSize)
// load object file into target memory
objFile->loadSegments(initVirtMem);
+ if (objFile->getInterpreter())
+ objFile->getInterpreter()->loadSegments(initVirtMem);
//Setup the auxilliary vectors. These will already have endian conversion.
//Auxilliary vectors are loaded only for elf formatted executables.
diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc
index e15197d78..35dde7600 100644
--- a/src/arch/riscv/process.cc
+++ b/src/arch/riscv/process.cc
@@ -125,6 +125,8 @@ RiscvProcess::argsInit(int pageSize)
updateBias();
objFile->loadSegments(initVirtMem);
+ if (objFile->getInterpreter())
+ objFile->getInterpreter()->loadSegments(initVirtMem);
ElfObject* elfObject = dynamic_cast<ElfObject*>(objFile);
memState->setStackMin(memState->getStackBase());
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index cca61c1be..1c020c6b1 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -209,6 +209,8 @@ SparcProcess::argsInit(int pageSize)
// load object file into target memory
objFile->loadSegments(initVirtMem);
+ if (objFile->getInterpreter())
+ objFile->getInterpreter()->loadSegments(initVirtMem);
enum hardwareCaps
{
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index c743685d0..546474138 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -775,6 +775,8 @@ X86Process::argsInit(int pageSize,
// load object file into target memory
objFile->loadSegments(initVirtMem);
+ if (objFile->getInterpreter())
+ objFile->getInterpreter()->loadSegments(initVirtMem);
enum X86CpuFeature {
X86_OnboardFPU = 1 << 0,