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-rw-r--r--src/cpu/IntrControl.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/IntrControl.py b/src/cpu/IntrControl.py
index eb4b1696b..72ea6ccb9 100644
--- a/src/cpu/IntrControl.py
+++ b/src/cpu/IntrControl.py
@@ -31,4 +31,5 @@ from m5.params import *
from m5.proxy import *
class IntrControl(SimObject):
type = 'IntrControl'
+ cxx_header = "cpu/intr_control.hh"
sys = Param.System(Parent.any, "the system we are part of")