summaryrefslogtreecommitdiff
path: root/src/cpu/SConscript
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/SConscript')
-rw-r--r--src/cpu/SConscript5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index a1074cb8b..370b83909 100644
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -109,6 +109,7 @@ SimObject('BaseCPU.py')
SimObject('FuncUnit.py')
SimObject('ExeTracer.py')
SimObject('IntelTrace.py')
+SimObject('IntrControl.py')
SimObject('NativeTrace.py')
Source('activity.cc')
@@ -118,6 +119,7 @@ Source('decode.cc')
Source('exetrace.cc')
Source('func_unit.cc')
Source('inteltrace.cc')
+Source('intr_control.cc')
Source('nativetrace.cc')
Source('pc_event.cc')
Source('quiesce_event.cc')
@@ -127,9 +129,6 @@ Source('thread_context.cc')
Source('thread_state.cc')
if env['FULL_SYSTEM']:
- SimObject('IntrControl.py')
-
- Source('intr_control.cc')
Source('profile.cc')
if env['TARGET_ISA'] == 'sparc':