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-rw-r--r--src/cpu/base.cc6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 06fcebad8..0ef206d90 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -344,8 +344,12 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
assert(newTC->threadId() == oldTC->threadId());
system->replaceThreadContext(newTC, newTC->contextId());
- if (DTRACE(Context))
+ /* This code no longer works since the zero register (e.g.,
+ * r31 on Alpha) doesn't necessarily contain zero at this
+ * point.
+ if (DTRACE(Context))
ThreadContext::compare(oldTC, newTC);
+ */
}
#if FULL_SYSTEM