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-rw-r--r--src/cpu/base.hh10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 0a3600764..a91ba862d 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -57,12 +57,12 @@
#include "sim/eventq.hh"
#include "sim/full_system.hh"
#include "sim/insttracer.hh"
+#include "sim/system.hh"
struct BaseCPUParams;
class BranchPred;
class CheckerCPU;
class ThreadContext;
-class System;
class CPUProgressEvent : public Event
{
@@ -117,6 +117,9 @@ class BaseCPU : public MemObject
/** Is the CPU switched out or active? */
bool _switchedOut;
+ /** Cache the cache line size that we get from the system */
+ const unsigned int _cacheLineSize;
+
public:
/**
@@ -343,6 +346,11 @@ class BaseCPU : public MemObject
System *system;
/**
+ * Get the cache line size of the system.
+ */
+ inline unsigned int cacheLineSize() const { return _cacheLineSize; }
+
+ /**
* Serialize this object to the given output stream.
*
* @note CPU models should normally overload the serializeThread()