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-rw-r--r--src/cpu/base.hh34
1 files changed, 23 insertions, 11 deletions
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 75e0d86af..9257778ef 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -40,6 +40,10 @@
#include "mem/mem_object.hh"
#include "arch/isa_traits.hh"
+#if FULL_SYSTEM
+#include "arch/interrupts.hh"
+#endif
+
class BranchPred;
class CheckerCPU;
class ThreadContext;
@@ -73,10 +77,25 @@ class BaseCPU : public MemObject
inline Tick cycles(int numCycles) const { return clock * numCycles; }
inline Tick curCycle() const { return curTick / clock; }
+ /** The next cycle the CPU should be scheduled, given a cache
+ * access or quiesce event returning on this cycle. This function
+ * may return curTick if the CPU should run on the current cycle.
+ */
+ Tick nextCycle();
+
+ /** The next cycle the CPU should be scheduled, given a cache
+ * access or quiesce event returning on the given Tick. This
+ * function may return curTick if the CPU should run on the
+ * current cycle.
+ * @param begin_tick The tick that the event is completing on.
+ */
+ Tick nextCycle(Tick begin_tick);
+
#if FULL_SYSTEM
protected:
- uint64_t interrupts[TheISA::NumInterruptLevels];
- uint64_t intstatus;
+// uint64_t interrupts[TheISA::NumInterruptLevels];
+// uint64_t intstatus;
+ TheISA::Interrupts interrupts;
public:
virtual void post_interrupt(int int_num, int index);
@@ -84,15 +103,8 @@ class BaseCPU : public MemObject
virtual void clear_interrupts();
bool checkInterrupts;
- bool check_interrupt(int int_num) const {
- if (int_num > TheISA::NumInterruptLevels)
- panic("int_num out of bounds\n");
-
- return interrupts[int_num] != 0;
- }
-
- bool check_interrupts() const { return intstatus != 0; }
- uint64_t intr_status() const { return intstatus; }
+ bool check_interrupts(ThreadContext * tc) const
+ { return interrupts.check_interrupts(tc); }
class ProfileEvent : public Event
{