summaryrefslogtreecommitdiff
path: root/src/cpu/checker/cpu.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/checker/cpu.hh')
-rw-r--r--src/cpu/checker/cpu.hh16
1 files changed, 0 insertions, 16 deletions
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 1419051a6..6f5125625 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -50,7 +50,6 @@
#include "arch/predecoder.hh"
#include "arch/types.hh"
#include "base/statistics.hh"
-#include "config/full_system.hh"
#include "cpu/base.hh"
#include "cpu/base_dyn_inst.hh"
#include "cpu/pc_event.hh"
@@ -61,24 +60,14 @@
#include "sim/eventq.hh"
// forward declarations
-#if FULL_SYSTEM
namespace TheISA
{
class TLB;
}
-class Processor;
-class PhysicalMemory;
-#else
-
-class Process;
-
-#endif // FULL_SYSTEM
template <class>
class BaseDynInst;
class ThreadContext;
-class MemInterface;
-class Checkpoint;
class Request;
/**
@@ -143,9 +132,7 @@ class CheckerCPU : public BaseCPU
TheISA::TLB *itb;
TheISA::TLB *dtb;
-#if FULL_SYSTEM
Addr dbg_vtophys(Addr addr);
-#endif
union Result {
uint64_t integer;
@@ -336,15 +323,12 @@ class CheckerCPU : public BaseCPU
{}
/////////////////////////////////////////////////////
-#if FULL_SYSTEM
Fault hwrei() { return thread->hwrei(); }
bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); }
void wakeup() { }
-#else
// Assume that the normal CPU's call to syscall was successful.
// The checker's state would have already been updated by the syscall.
void syscall(uint64_t callnum) { }
-#endif
void handleError()
{