summaryrefslogtreecommitdiff
path: root/src/cpu/checker/cpu_impl.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/checker/cpu_impl.hh')
-rw-r--r--src/cpu/checker/cpu_impl.hh22
1 files changed, 10 insertions, 12 deletions
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index d81858c14..57282cd13 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -244,16 +244,17 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
// If not in the middle of a macro instruction
if (!curMacroStaticInst) {
// set up memory request for instruction fetch
- memReq = new Request(unverifiedInst->threadNumber, fetch_PC,
- sizeof(MachInst),
- 0,
- masterId,
- fetch_PC, thread->contextId());
- memReq->setVirt(0, fetch_PC, sizeof(MachInst),
- Request::INST_FETCH, masterId, thread->instAddr());
+ auto mem_req = std::make_shared<Request>(
+ unverifiedInst->threadNumber, fetch_PC,
+ sizeof(MachInst), 0, masterId, fetch_PC,
+ thread->contextId());
+ mem_req->setVirt(0, fetch_PC, sizeof(MachInst),
+ Request::INST_FETCH, masterId,
+ thread->instAddr());
- fault = itb->translateFunctional(memReq, tc, BaseTLB::Execute);
+ fault = itb->translateFunctional(
+ mem_req, tc, BaseTLB::Execute);
if (fault != NoFault) {
if (unverifiedInst->getFault() == NoFault) {
@@ -270,7 +271,6 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
advancePC(NoFault);
// Give up on an ITB fault..
- delete memReq;
unverifiedInst = NULL;
return;
} else {
@@ -278,17 +278,15 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
// the fault and see if our results match the CPU on
// the next tick().
fault = unverifiedInst->getFault();
- delete memReq;
break;
}
} else {
- PacketPtr pkt = new Packet(memReq, MemCmd::ReadReq);
+ PacketPtr pkt = new Packet(mem_req, MemCmd::ReadReq);
pkt->dataStatic(&machInst);
icachePort->sendFunctional(pkt);
machInst = gtoh(machInst);
- delete memReq;
delete pkt;
}
}