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-rw-r--r--src/cpu/checker/thread_context.hh16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index b2806d40b..cd399dd22 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -87,9 +87,9 @@ class CheckerThreadContext : public ThreadContext
PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); }
- AlphaITB *getITBPtr() { return actualTC->getITBPtr(); }
+ TheISA::ITB *getITBPtr() { return actualTC->getITBPtr(); }
- AlphaDTB *getDTBPtr() { return actualTC->getDTBPtr(); }
+ TheISA::DTB *getDTBPtr() { return actualTC->getDTBPtr(); }
Kernel::Statistics *getKernelStats() { return actualTC->getKernelStats(); }
@@ -248,19 +248,19 @@ class CheckerThreadContext : public ThreadContext
MiscReg readMiscReg(int misc_reg)
{ return actualTC->readMiscReg(misc_reg); }
- MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
- { return actualTC->readMiscRegWithEffect(misc_reg, fault); }
+ MiscReg readMiscRegWithEffect(int misc_reg)
+ { return actualTC->readMiscRegWithEffect(misc_reg); }
- Fault setMiscReg(int misc_reg, const MiscReg &val)
+ void setMiscReg(int misc_reg, const MiscReg &val)
{
checkerTC->setMiscReg(misc_reg, val);
- return actualTC->setMiscReg(misc_reg, val);
+ actualTC->setMiscReg(misc_reg, val);
}
- Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
+ void setMiscRegWithEffect(int misc_reg, const MiscReg &val)
{
checkerTC->setMiscRegWithEffect(misc_reg, val);
- return actualTC->setMiscRegWithEffect(misc_reg, val);
+ actualTC->setMiscRegWithEffect(misc_reg, val);
}
unsigned readStCondFailures()