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Diffstat (limited to 'src/cpu/checker/thread_context.hh')
-rw-r--r--src/cpu/checker/thread_context.hh18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 8ce5a740d..99506c1c8 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -209,9 +209,9 @@ class CheckerThreadContext : public ThreadContext
RegVal readIntReg(int reg_idx) { return actualTC->readIntReg(reg_idx); }
RegVal
- readFloatRegBits(int reg_idx)
+ readFloatReg(int reg_idx)
{
- return actualTC->readFloatRegBits(reg_idx);
+ return actualTC->readFloatReg(reg_idx);
}
const VecRegContainer& readVecReg(const RegId& reg) const
@@ -280,10 +280,10 @@ class CheckerThreadContext : public ThreadContext
}
void
- setFloatRegBits(int reg_idx, RegVal val)
+ setFloatReg(int reg_idx, RegVal val)
{
- actualTC->setFloatRegBits(reg_idx, val);
- checkerTC->setFloatRegBits(reg_idx, val);
+ actualTC->setFloatReg(reg_idx, val);
+ checkerTC->setFloatReg(reg_idx, val);
}
void
@@ -404,15 +404,15 @@ class CheckerThreadContext : public ThreadContext
}
RegVal
- readFloatRegBitsFlat(int idx)
+ readFloatRegFlat(int idx)
{
- return actualTC->readFloatRegBitsFlat(idx);
+ return actualTC->readFloatRegFlat(idx);
}
void
- setFloatRegBitsFlat(int idx, RegVal val)
+ setFloatRegFlat(int idx, RegVal val)
{
- actualTC->setFloatRegBitsFlat(idx, val);
+ actualTC->setFloatRegFlat(idx, val);
}
const VecRegContainer &