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-rw-r--r--src/cpu/checker/cpu.cc14
-rw-r--r--src/cpu/checker/cpu.hh21
-rw-r--r--src/cpu/checker/cpu_impl.hh46
-rw-r--r--src/cpu/checker/thread_context.hh16
4 files changed, 30 insertions, 67 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index 0c7fe66bf..ec4496eb4 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -31,17 +31,14 @@
#include <list>
#include <string>
+#include "arch/kernel_stats.hh"
+#include "arch/vtophys.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
-#if FULL_SYSTEM
-#include "arch/kernel_stats.hh"
-#include "arch/vtophys.hh"
-#endif // FULL_SYSTEM
-
using namespace std;
//The CheckerCPU does alpha only
using namespace AlphaISA;
@@ -66,17 +63,14 @@ CheckerCPU::CheckerCPU(Params *p)
exitOnError = p->exitOnError;
warnOnlyOnLoadError = p->warnOnlyOnLoadError;
-#if FULL_SYSTEM
itb = p->itb;
dtb = p->dtb;
systemPtr = NULL;
-#else
process = p->process;
thread = new SimpleThread(this, /* thread_num */ 0, process);
tc = thread->getTC();
threadContexts.push_back(tc);
-#endif
result.integer = 0;
}
@@ -88,7 +82,6 @@ CheckerCPU::~CheckerCPU()
void
CheckerCPU::setSystem(System *system)
{
-#if FULL_SYSTEM
systemPtr = system;
thread = new SimpleThread(this, 0, systemPtr, itb, dtb, false);
@@ -97,7 +90,6 @@ CheckerCPU::setSystem(System *system)
threadContexts.push_back(tc);
delete thread->kernelStats;
thread->kernelStats = NULL;
-#endif
}
void
@@ -301,13 +293,11 @@ CheckerCPU::write(int32_t data, Addr addr, unsigned flags, uint64_t *res)
}
-#if FULL_SYSTEM
Addr
CheckerCPU::dbg_vtophys(Addr addr)
{
return vtophys(tc, addr);
}
-#endif // FULL_SYSTEM
bool
CheckerCPU::checkFlags(Request *req)
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 1e3a17a34..a3e95137d 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -37,7 +37,6 @@
#include "arch/types.hh"
#include "base/statistics.hh"
-#include "config/full_system.hh"
#include "cpu/base.hh"
#include "cpu/base_dyn_inst.hh"
#include "cpu/pc_event.hh"
@@ -46,25 +45,20 @@
#include "sim/eventq.hh"
// forward declarations
-#if FULL_SYSTEM
namespace TheISA
{
class TLB;
}
-class Processor;
-class PhysicalMemory;
-
-#else
-class Process;
-
-#endif // FULL_SYSTEM
template <class>
class BaseDynInst;
class CheckerCPUParams;
-class ThreadContext;
-class MemInterface;
class Checkpoint;
+class MemInterface;
+class PhysicalMemory;
+class Process;
+class Processor;
+class ThreadContext;
class Request;
/**
@@ -129,9 +123,7 @@ class CheckerCPU : public BaseCPU
TheISA::TLB *itb;
TheISA::TLB *dtb;
-#if FULL_SYSTEM
Addr dbg_vtophys(Addr addr);
-#endif
union Result {
uint64_t integer;
@@ -273,14 +265,11 @@ class CheckerCPU : public BaseCPU
this->dtb->demapPage(vaddr, asn);
}
-#if FULL_SYSTEM
Fault hwrei() { return thread->hwrei(); }
bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); }
-#else
// Assume that the normal CPU's call to syscall was successful.
// The checker's state would have already been updated by the syscall.
void syscall(uint64_t callnum) { }
-#endif
void handleError()
{
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 8694dae21..7d8cc8a19 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -31,6 +31,7 @@
#include <list>
#include <string>
+#include "arch/vtophys.hh"
#include "base/refcnt.hh"
#include "config/the_isa.hh"
#include "cpu/checker/cpu.hh"
@@ -38,13 +39,10 @@
#include "cpu/simple_thread.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "sim/full_system.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
-#if FULL_SYSTEM
-#include "arch/vtophys.hh"
-#endif // FULL_SYSTEM
-
using namespace std;
//The CheckerCPU does alpha only
using namespace AlphaISA;
@@ -141,11 +139,7 @@ Checker<DynInstPtr>::verify(DynInstPtr &completed_inst)
// Try to fetch the instruction
-#if FULL_SYSTEM
-#define IFETCH_FLAGS(pc) ((pc) & 1) ? PHYSICAL : 0
-#else
-#define IFETCH_FLAGS(pc) 0
-#endif
+#define IFETCH_FLAGS(pc) (FullSystem ? 0 : ((pc) & 1) ? PHYSICAL : 0)
uint64_t fetch_PC = thread->readPC() & ~3;
@@ -235,12 +229,10 @@ Checker<DynInstPtr>::verify(DynInstPtr &completed_inst)
}
if (fault != NoFault) {
-#if FULL_SYSTEM
fault->invoke(tc, curStaticInst);
willChangePC = true;
newPC = thread->readPC();
DPRINTF(Checker, "Fault, PC is now %#x\n", newPC);
-#endif
} else {
#if THE_ISA != MIPS_ISA
// go to the next instruction
@@ -255,23 +247,23 @@ Checker<DynInstPtr>::verify(DynInstPtr &completed_inst)
}
-#if FULL_SYSTEM
- // @todo: Determine if these should happen only if the
- // instruction hasn't faulted. In the SimpleCPU case this may
- // not be true, but in the O3 or Ozone case this may be true.
- Addr oldpc;
- int count = 0;
- do {
- oldpc = thread->readPC();
- system->pcEventQueue.service(tc);
- count++;
- } while (oldpc != thread->readPC());
- if (count > 1) {
- willChangePC = true;
- newPC = thread->readPC();
- DPRINTF(Checker, "PC Event, PC is now %#x\n", newPC);
+ if (FullSystem) {
+ // @todo: Determine if these should happen only if the
+ // instruction hasn't faulted. In the SimpleCPU case this may
+ // not be true, but in the O3 or Ozone case this may be true.
+ Addr oldpc;
+ int count = 0;
+ do {
+ oldpc = thread->readPC();
+ system->pcEventQueue.service(tc);
+ count++;
+ } while (oldpc != thread->readPC());
+ if (count > 1) {
+ willChangePC = true;
+ newPC = thread->readPC();
+ DPRINTF(Checker, "PC Event, PC is now %#x\n", newPC);
+ }
}
-#endif
// @todo: Optionally can check all registers. (Or just those
// that have been modified).
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 5bd3ed734..6c3c50a9c 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -89,7 +89,6 @@ class CheckerThreadContext : public ThreadContext
TheISA::TLB *getDTBPtr() { return actualTC->getDTBPtr(); }
-#if FULL_SYSTEM
System *getSystemPtr() { return actualTC->getSystemPtr(); }
PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); }
@@ -97,15 +96,14 @@ class CheckerThreadContext : public ThreadContext
TheISA::Kernel::Statistics *getKernelStats()
{ return actualTC->getKernelStats(); }
- FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
+ Process *getProcessPtr() { return actualTC->getProcessPtr(); }
+
+ TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
VirtualPort *getVirtPort()
{ return actualTC->getVirtPort(); }
-#else
- TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
- Process *getProcessPtr() { return actualTC->getProcessPtr(); }
-#endif
+ FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
Status status() const { return actualTC->status(); }
@@ -125,9 +123,7 @@ class CheckerThreadContext : public ThreadContext
/// Set the status to Halted.
void halt() { actualTC->halt(); }
-#if FULL_SYSTEM
void dumpFuncProfile() { actualTC->dumpFuncProfile(); }
-#endif
void takeOverFrom(ThreadContext *oldContext)
{
@@ -141,7 +137,6 @@ class CheckerThreadContext : public ThreadContext
void unserialize(Checkpoint *cp, const std::string &section)
{ actualTC->unserialize(cp, section); }
-#if FULL_SYSTEM
EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); }
Tick readLastActivate() { return actualTC->readLastActivate(); }
@@ -149,7 +144,6 @@ class CheckerThreadContext : public ThreadContext
void profileClear() { return actualTC->profileClear(); }
void profileSample() { return actualTC->profileSample(); }
-#endif
int threadId() { return actualTC->threadId(); }
@@ -253,9 +247,7 @@ class CheckerThreadContext : public ThreadContext
// @todo: Fix this!
bool misspeculating() { return actualTC->misspeculating(); }
-#if !FULL_SYSTEM
Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
-#endif
};
#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-25 02:55:27 +0000