diff options
Diffstat (limited to 'src/cpu/decode_cache.cc')
-rw-r--r-- | src/cpu/decode_cache.cc | 113 |
1 files changed, 113 insertions, 0 deletions
diff --git a/src/cpu/decode_cache.cc b/src/cpu/decode_cache.cc new file mode 100644 index 000000000..636bf9284 --- /dev/null +++ b/src/cpu/decode_cache.cc @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2011-2012 Google + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "arch/decoder.hh" +#include "arch/isa_traits.hh" +#include "arch/types.hh" +#include "base/hashmap.hh" +#include "config/the_isa.hh" +#include "cpu/static_inst.hh" + +void +DecodeCache::DecodePages::update(PageIt recentest) +{ + recent[1] = recent[0]; + recent[0] = recentest; +} + +void +DecodeCache::DecodePages::addPage(Addr addr, DecodePage *page) +{ + Addr page_addr = addr & ~(TheISA::PageBytes - 1); + typename PageMap::value_type to_insert(page_addr, page); + update(pageMap.insert(to_insert).first); +} + +DecodeCache::DecodePages::DecodePages() +{ + recent[0] = recent[1] = pageMap.end(); +} + +DecodeCache::DecodePage * +DecodeCache::DecodePages::getPage(Addr addr) +{ + Addr page_addr = addr & ~(TheISA::PageBytes - 1); + + // Check against recent lookups. + if (recent[0] != pageMap.end()) { + if (recent[0]->first == page_addr) + return recent[0]->second; + if (recent[1] != pageMap.end() && + recent[1]->first == page_addr) { + update(recent[1]); + // recent[1] has just become recent[0]. + return recent[0]->second; + } + } + + // Actually look in the has_map. + PageIt it = pageMap.find(page_addr); + if (it != pageMap.end()) { + update(it); + return it->second; + } + + // Didn't find an existing page, so add a new one. + DecodePage *newPage = new DecodePage; + addPage(page_addr, newPage); + return newPage; +} + +StaticInstPtr +DecodeCache::decode(TheISA::Decoder *decoder, + ExtMachInst mach_inst, Addr addr) +{ + // Try to find a matching address based table of instructions. + DecodePage *page = decodePages.getPage(addr); + + // Use the table to decode the instruction. It will fall back to other + // mechanisms if it needs to. + Addr offset = addr & (TheISA::PageBytes - 1); + StaticInstPtr si = page->insts[offset]; + if (si && (si->machInst == mach_inst)) + return si; + + InstMap::iterator iter = instMap.find(mach_inst); + if (iter != instMap.end()) { + si = iter->second; + page->insts[offset] = si; + return si; + } + + si = decoder->decodeInst(mach_inst); + instMap[mach_inst] = si; + page->insts[offset] = si; + return si; +} |