1 files changed, 6 insertions, 42 deletions

diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index d848226c4..70fd59418 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -419,18 +419,12 @@ InOrderDynInst::readMiscReg(int misc_reg)
     return this->cpu->readMiscReg(misc_reg, threadNumber);
 }
 
+
 /** Reads a misc. register, including any side-effects the read
  * might have as defined by the architecture.
  */
 MiscReg
-InOrderDynInst::readMiscRegNoEffect(int misc_reg)
-{
-    return this->cpu->readMiscRegNoEffect(misc_reg, threadNumber);
-}
-
-/** Reads a miscellaneous register. */
-MiscReg
-InOrderDynInst::readMiscRegOperandNoEffect(const StaticInst *si, int idx)
+InOrderDynInst::readMiscRegOperand(const StaticInst *si, int idx)
 {
     DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Misc. Reg Source Value %i"
             " read as %#x.\n", threadNumber, seqNum, idx,
@@ -438,22 +432,13 @@ InOrderDynInst::readMiscRegOperandNoEffect(const StaticInst *si, int idx)
     return instSrc[idx].integer;
 }
 
-/** Reads a misc. register, including any side-effects the read
+
+/** Sets a misc. register, including any side-effects the write
  * might have as defined by the architecture.
  */
-MiscReg
-InOrderDynInst::readMiscRegOperand(const StaticInst *si, int idx)
-{
-    // For In-Order, the side-effect of reading a register happens
-    // when explicitly executing a "ReadSrc" command. This simply returns
-    // a value.
-    return readMiscRegOperandNoEffect(si, idx);
-}
-
-/** Sets a misc. register. */
 void
-InOrderDynInst::setMiscRegOperandNoEffect(const StaticInst * si, int idx,
-                                          const MiscReg &val)
+InOrderDynInst::setMiscRegOperand(const StaticInst *si, int idx,
+                       const MiscReg &val)
 {
     instResult[idx].type = Integer;
     instResult[idx].val.integer = val;
@@ -463,19 +448,6 @@ InOrderDynInst::setMiscRegOperandNoEffect(const StaticInst * si, int idx,
             "being set to %#x.\n", threadNumber, seqNum, idx, val);
 }
 
-/** Sets a misc. register, including any side-effects the write
- * might have as defined by the architecture.
- */
-void
-InOrderDynInst::setMiscRegOperand(const StaticInst *si, int idx,
-                       const MiscReg &val)
-{
-    // For In-Order, the side-effect of setting a register happens
-    // when explicitly writing back the register value. This
-    // simply maintains the operand value.
-    setMiscRegOperandNoEffect(si, idx, val);
-}
-
 MiscReg
 InOrderDynInst::readRegOtherThread(unsigned reg_idx, ThreadID tid)
 {
@@ -534,14 +506,6 @@ InOrderDynInst::setFloatRegOperandBits(const StaticInst *si, int idx,
             threadNumber, seqNum, idx, val, instResult[idx].tick);
 }
 
-/** Sets a misc. register. */
-/* Alter this when wanting to *speculate* on Miscellaneous registers */
-void
-InOrderDynInst::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
-{
-    this->cpu->setMiscRegNoEffect(misc_reg, val, threadNumber);
-}
-
 /** Sets a misc. register, including any side-effects the write
  * might have as defined by the architecture.
  */