1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/inorder/pipeline_stage.hh b/src/cpu/inorder/pipeline_stage.hh
index c971e400e..6df104e6c 100644
--- a/src/cpu/inorder/pipeline_stage.hh
+++ b/src/cpu/inorder/pipeline_stage.hh
@@ -293,15 +293,15 @@ class PipelineStage
     /** SeqNum of Squashing Branch Delay Instruction (used for MIPS) */
     Addr bdelayDoneSeqNum[ThePipeline::MaxThreads];
 
-    /** Instruction used for squashing branch (used for MIPS) */
-    DynInstPtr squashInst[ThePipeline::MaxThreads];
-
     /** Tells when their is a pending delay slot inst. to send
      *  to rename. If there is, then wait squash after the next
      *  instruction (used for MIPS).
      */
     bool squashAfterDelaySlot[ThePipeline::MaxThreads];
 
+    /** Instruction used for squashing branch (used for MIPS) */
+    DynInstPtr squashInst[ThePipeline::MaxThreads];
+
     /** Maximum size of the inter-stage buffer connecting the previous stage to
      *  this stage (which we call a skid buffer) */
     unsigned stageBufferMax;