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-rw-r--r--src/cpu/inorder/pipeline_traits.cc16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/cpu/inorder/pipeline_traits.cc b/src/cpu/inorder/pipeline_traits.cc
index 397170163..fe400471a 100644
--- a/src/cpu/inorder/pipeline_traits.cc
+++ b/src/cpu/inorder/pipeline_traits.cc
@@ -77,6 +77,8 @@ void createFrontEndSchedule(DynInstPtr &inst)
D->needs(Decode, DecodeUnit::DecodeInst);
D->needs(BPred, BranchPredictor::PredictBranch);
D->needs(FetchSeq, FetchSeqUnit::UpdateTargetPC);
+
+ inst->resSched.init();
}
bool createBackEndSchedule(DynInstPtr &inst)
@@ -152,4 +154,18 @@ InstStage::InstStage(DynInstPtr inst, int stage_num)
instSched = &inst->resSched;
}
+void
+InstStage::needs(int unit, int request) {
+ instSched->push( new ScheduleEntry(
+ stageNum, nextTaskPriority++, unit, request
+ ));
+}
+
+void
+InstStage::needs(int unit, int request, int param) {
+ instSched->push( new ScheduleEntry(
+ stageNum, nextTaskPriority++, unit, request, param
+ ));
+}
+
};