diff options
Diffstat (limited to 'src/cpu/inorder/resources/branch_predictor.cc')
| -rw-r--r-- | src/cpu/inorder/resources/branch_predictor.cc | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/src/cpu/inorder/resources/branch_predictor.cc b/src/cpu/inorder/resources/branch_predictor.cc index 004cf8b63..50d3847ba 100644 --- a/src/cpu/inorder/resources/branch_predictor.cc +++ b/src/cpu/inorder/resources/branch_predictor.cc @@ -44,7 +44,7 @@ BranchPredictor::BranchPredictor(std::string res_name, int res_id, InOrderCPU *_cpu, ThePipeline::Params *params) : Resource(res_name, res_id, res_width, res_latency, _cpu), - branchPred(this, params) + branchPred(params->branchPred) { instSize = sizeof(MachInst); } @@ -61,8 +61,6 @@ BranchPredictor::regStats() .desc("Number of Branches Predicted As Not Taken (False)."); Resource::regStats(); - - branchPred.regStats(); } void @@ -97,6 +95,7 @@ BranchPredictor::execute(int slot_num) DPRINTF(InOrderStage, "[tid:%u]: [sn:%i]: squashed, " "skipping prediction \n", tid, inst->seqNum); } else { + TheISA::PCState instPC = inst->pcState(); TheISA::PCState pred_PC = inst->pcState(); TheISA::advancePC(pred_PC, inst->staticInst); @@ -104,7 +103,9 @@ BranchPredictor::execute(int slot_num) // If not, the pred_PC be updated to pc+8 // If predicted, the pred_PC will be updated to new target // value - bool predict_taken = branchPred.predict(inst, pred_PC, tid); + bool predict_taken = branchPred->predictInOrder( + inst->staticInst, inst->seqNum, + inst->asid, instPC, pred_PC, tid); if (predict_taken) { DPRINTF(InOrderBPred, "[tid:%i]: [sn:%i]: Branch " @@ -119,8 +120,8 @@ BranchPredictor::execute(int slot_num) inst->setBranchPred(predict_taken); } - //@todo: Check to see how hw_rei is handled here...how does PC,NPC get - // updated to compare mispredict against??? + //@todo: Check to see how hw_rei is handled here...how does + //PC,NPC get updated to compare mispredict against??? inst->setPredTarg(pred_PC); DPRINTF(InOrderBPred, "[tid:%i]: [sn:%i]: %s Predicted PC is " "%s.\n", tid, seq_num, inst->instName(), pred_PC); @@ -143,7 +144,7 @@ BranchPredictor::execute(int slot_num) tid, seq_num); - branchPred.update(seq_num, tid); + branchPred->update(seq_num, tid); } bpred_req->done(); @@ -165,18 +166,16 @@ BranchPredictor::squash(DynInstPtr inst, int squash_stage, // update due to branch resolution if (squash_stage >= ThePipeline::BackEndStartStage) { - branchPred.squash(bpred_squash_num, - inst->pcState(), - inst->pcState().branching(), - tid); + branchPred->squash(bpred_squash_num, inst->pcState(), + inst->pcState().branching(), tid); } else { // update due to predicted taken branch - branchPred.squash(bpred_squash_num, tid); + branchPred->squash(bpred_squash_num, tid); } } void BranchPredictor::instGraduated(InstSeqNum seq_num, ThreadID tid) { - branchPred.update(seq_num, tid); + branchPred->update(seq_num, tid); } |