diff options
Diffstat (limited to 'src/cpu/inorder/resources/cache_unit.cc')
| -rw-r--r-- | src/cpu/inorder/resources/cache_unit.cc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index 5e374fa40..68daee512 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -252,6 +252,8 @@ CacheUnit::execute(int slot_num) break; case CompleteFetch: + // @TODO: MOVE Functionality of handling fetched data into 'fetch unit' + // let cache-unit just be responsible for transferring data. if (cache_req->isMemAccComplete()) { DPRINTF(InOrderCachePort, "[tid:%i]: Completing Fetch Access for [sn:%i]\n", @@ -284,6 +286,8 @@ CacheUnit::execute(int slot_num) inst->traceData->setPC(inst->readPC()); } + delete cache_req->dataPkt; + cache_req->done(); } else { DPRINTF(InOrderCachePort, @@ -481,6 +485,7 @@ CacheUnit::processCacheCompletion(PacketPtr pkt) cache_pkt->cacheReq->getInst()->seqNum); cache_pkt->cacheReq->done(); + delete cache_pkt; return; } @@ -543,6 +548,8 @@ CacheUnit::processCacheCompletion(PacketPtr pkt) getMemData(cache_pkt)); } + + delete cache_pkt; } cache_req->setMemAccPending(false); |