diff options
Diffstat (limited to 'src/cpu/inorder/resources')
-rw-r--r-- | src/cpu/inorder/resources/cache_unit.cc | 40 | ||||
-rw-r--r-- | src/cpu/inorder/resources/cache_unit.hh | 13 | ||||
-rw-r--r-- | src/cpu/inorder/resources/fetch_unit.cc | 2 |
3 files changed, 45 insertions, 10 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index d21597aba..41429510d 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -70,21 +70,27 @@ printMemData(uint8_t *data, unsigned size) Tick CacheUnit::CachePort::recvAtomic(PacketPtr pkt) { - panic("CacheUnit::CachePort doesn't expect recvAtomic callback!"); + panic("%s doesn't expect recvAtomic callback!", cachePortUnit->name()); return curTick(); } void CacheUnit::CachePort::recvFunctional(PacketPtr pkt) { - panic("CacheUnit::CachePort doesn't expect recvFunctional callback!"); + DPRINTF(InOrderCachePort, "Doesn't update state on a recvFunctional." + "Ignoring packet for %x.\n", pkt->getAddr()); } void CacheUnit::CachePort::recvStatusChange(Status status) { - if (status == RangeChange) + if (status == RangeChange) { + if (!snoopRangeSent) { + snoopRangeSent = true; + sendStatusChange(Port::RangeChange); + } return; + } panic("CacheUnit::CachePort doesn't expect recvStatusChange callback!"); } @@ -92,7 +98,16 @@ CacheUnit::CachePort::recvStatusChange(Status status) bool CacheUnit::CachePort::recvTiming(Packet *pkt) { - cachePortUnit->processCacheCompletion(pkt); + DPRINTF(Cache, "RecvTiming: Pkt %x,\n", pkt->getAddr()); + + if (pkt->isError()) + DPRINTF(InOrderCachePort, "Got error packet back for address: %x\n", + pkt->getAddr()); + else if (pkt->isResponse()) + cachePortUnit->processCacheCompletion(pkt); + else + DPRINTF(Cache, "Received snoop pkt %x,Ignoring\n", pkt->getAddr()); + return true; } @@ -130,6 +145,21 @@ CacheUnit::tlb() } +void +CacheUnit::CachePort::setPeer(Port *port) +{ + Port::setPeer(port); + +#if FULL_SYSTEM + // Update the ThreadContext's memory ports (Functional/Virtual + // Ports) + if (cachePortUnit->resName == "dcache_port") { + cachePortUnit->cpu->updateMemPorts(); + } + +#endif +} + Port * CacheUnit::getPort(const string &if_name, int idx) { @@ -1022,6 +1052,8 @@ CacheUnit::processSquash(CacheReqPacket *cache_pkt) void CacheUnit::processCacheCompletion(PacketPtr pkt) { + //@todo: use packet sender state instead of deriving from packet class to + // get special state CacheReqPacket* cache_pkt = dynamic_cast<CacheReqPacket*>(pkt); assert(cache_pkt); diff --git a/src/cpu/inorder/resources/cache_unit.hh b/src/cpu/inorder/resources/cache_unit.hh index 91a8703f7..611ab62f2 100644 --- a/src/cpu/inorder/resources/cache_unit.hh +++ b/src/cpu/inorder/resources/cache_unit.hh @@ -89,16 +89,18 @@ class CacheUnit : public Resource CachePort(CacheUnit *_cachePortUnit) : Port(_cachePortUnit->name() + "-cache-port", (MemObject*)_cachePortUnit->cpu), - cachePortUnit(_cachePortUnit) + cachePortUnit(_cachePortUnit), snoopRangeSent(false) { } bool snoopRangeSent; + void setPeer(Port *port); + protected: /** Atomic version of receive. Panics. */ Tick recvAtomic(PacketPtr pkt); - /** Functional version of receive. Panics. */ + /** Functional version of receive.*/ void recvFunctional(PacketPtr pkt); /** Receives status change. Other than range changing, panics. */ @@ -106,11 +108,10 @@ class CacheUnit : public Resource /** Returns the address ranges of this device. */ void getDeviceAddressRanges(AddrRangeList &resp, - AddrRangeList &snoop) - { resp.clear(); snoop.clear(); } + bool &snoop) + { resp.clear(); snoop = true; } - /** Timing version of receive. Handles setting fetch to the - * proper status to start fetching. */ + /** Timing version of receive */ bool recvTiming(PacketPtr pkt); /** Handles doing a retry of a failed fetch. */ diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc index 28200c852..958d69b34 100644 --- a/src/cpu/inorder/resources/fetch_unit.cc +++ b/src/cpu/inorder/resources/fetch_unit.cc @@ -423,6 +423,8 @@ void FetchUnit::processCacheCompletion(PacketPtr pkt) { // Cast to correct packet type + // @todo: use pkt Sender state here to be consistent with other + // cpu models CacheReqPacket* cache_pkt = dynamic_cast<CacheReqPacket*>(pkt); assert(cache_pkt); |