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-rw-r--r--src/cpu/inorder/resources/cache_unit.cc14
-rw-r--r--src/cpu/inorder/resources/fetch_seq_unit.cc6
-rw-r--r--src/cpu/inorder/resources/fetch_seq_unit.hh1
3 files changed, 19 insertions, 2 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index 570d27fbe..8f92db3e4 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -158,9 +158,9 @@ CacheUnit::getSlot(DynInstPtr inst)
return new_slot;
} else {
DPRINTF(InOrderCachePort,
- "Denying request because there is an outstanding"
+ "[tid:%i] Denying request because there is an outstanding"
" request to/for addr. %08p. by [sn:%i] @ tick %i\n",
- req_addr, addrMap[req_addr], inst->memTime);
+ inst->readTid(), req_addr, addrMap[req_addr], inst->memTime);
return -1;
}
}
@@ -702,6 +702,13 @@ CacheUnit::processCacheCompletion(PacketPtr pkt)
cache_req->setMemAccPending(false);
cache_req->setMemAccCompleted();
+ if (cache_req->isMemStall() &&
+ cpu->threadModel == InOrderCPU::SwitchOnCacheMiss) {
+ DPRINTF(InOrderCachePort, "[tid:%u] Waking up from Cache Miss.\n");
+
+ cpu->activateContext(tid);
+ }
+
// Wake up the CPU (if it went to sleep and was waiting on this
// completion event).
cpu->wakeCPU();
@@ -784,6 +791,9 @@ CacheUnit::squashDueToMemStall(DynInstPtr inst, int stage_num,
// thread then you need to reevaluate this code
// NOTE: squash should originate from
// pipeline_stage.cc:processInstSchedule
+ DPRINTF(InOrderCachePort, "Squashing above [sn:%u]\n",
+ squash_seq_num + 1);
+
squash(inst, stage_num, squash_seq_num + 1, tid);
}
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc
index 1d0b92075..e0b9ea1f9 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.cc
+++ b/src/cpu/inorder/resources/fetch_seq_unit.cc
@@ -336,3 +336,9 @@ FetchSeqUnit::deactivateThread(ThreadID tid)
if (thread_it != cpu->fetchPriorityList.end())
cpu->fetchPriorityList.erase(thread_it);
}
+
+void
+FetchSeqUnit::suspendThread(ThreadID tid)
+{
+ deactivateThread(tid);
+}
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.hh b/src/cpu/inorder/resources/fetch_seq_unit.hh
index a4495564b..fdbc4521f 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.hh
+++ b/src/cpu/inorder/resources/fetch_seq_unit.hh
@@ -59,6 +59,7 @@ class FetchSeqUnit : public Resource {
virtual void init();
virtual void activateThread(ThreadID tid);
virtual void deactivateThread(ThreadID tid);
+ virtual void suspendThread(ThreadID tid);
virtual void execute(int slot_num);
/** Override default Resource squash sequence. This actually,