diff options
Diffstat (limited to 'src/cpu/inorder/resources')
| -rw-r--r-- | src/cpu/inorder/resources/bpred_unit.cc | 6 | ||||
| -rw-r--r-- | src/cpu/inorder/resources/branch_predictor.cc | 8 | ||||
| -rw-r--r-- | src/cpu/inorder/resources/fetch_seq_unit.cc | 6 |
3 files changed, 13 insertions, 7 deletions
diff --git a/src/cpu/inorder/resources/bpred_unit.cc b/src/cpu/inorder/resources/bpred_unit.cc index 25b8b165a..778366532 100644 --- a/src/cpu/inorder/resources/bpred_unit.cc +++ b/src/cpu/inorder/resources/bpred_unit.cc @@ -250,7 +250,7 @@ BPredUnit::predict(DynInstPtr &inst, TheISA::PCState &predPC, ThreadID tid) tid, asid, inst->pcState(), target); } else { DPRINTF(InOrderBPred, "[tid:%i]: BTB doesn't have a " - "valid entry.\n",tid); + "valid entry, predicting false.\n",tid); pred_taken = false; } } @@ -369,7 +369,9 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, BPUpdate((*hist_it).pc.instAddr(), actually_taken, pred_hist.front().bpHistory); - BTB.update((*hist_it).pc.instAddr(), corrTarget, asid); + // only update BTB on branch taken right??? + if (actually_taken) + BTB.update((*hist_it).pc.instAddr(), corrTarget, asid); DPRINTF(InOrderBPred, "[tid:%i]: Removing history for [sn:%i] " "PC %s.\n", tid, (*hist_it).seqNum, (*hist_it).pc); diff --git a/src/cpu/inorder/resources/branch_predictor.cc b/src/cpu/inorder/resources/branch_predictor.cc index 3132770d4..3dea92cfb 100644 --- a/src/cpu/inorder/resources/branch_predictor.cc +++ b/src/cpu/inorder/resources/branch_predictor.cc @@ -152,10 +152,14 @@ BranchPredictor::squash(DynInstPtr inst, int squash_stage, DPRINTF(InOrderBPred, "[tid:%i][sn:%i] Squashing...\n", tid, bpred_squash_num); + // update due to branch resolution if (squash_stage >= ThePipeline::BackEndStartStage) { - bool taken = inst->predTaken(); - branchPred.squash(bpred_squash_num, inst->readPredTarg(), taken, tid); + branchPred.squash(bpred_squash_num, + inst->pcState(), + inst->pcState().branching(), + tid); } else { + // update due to predicted taken branch branchPred.squash(bpred_squash_num, tid); } } diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc index 072ecb76f..8a55822a6 100644 --- a/src/cpu/inorder/resources/fetch_seq_unit.cc +++ b/src/cpu/inorder/resources/fetch_seq_unit.cc @@ -79,13 +79,13 @@ FetchSeqUnit::execute(int slot_num) ThreadID tid = inst->readTid(); int stage_num = fs_req->getStageNum(); - DPRINTF(InOrderFetchSeq, "[tid:%i]: Current PC is %s\n", tid, - pc[tid]); - switch (fs_req->cmd) { case AssignNextPC: { + DPRINTF(InOrderFetchSeq, "[tid:%i]: Current PC is %s\n", tid, + pc[tid]); + if (pcValid[tid]) { inst->pcState(pc[tid]); inst->setMemAddr(pc[tid].instAddr()); |