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-rw-r--r--src/cpu/inorder/resources/execution_unit.cc12
-rw-r--r--src/cpu/inorder/resources/use_def.cc13
-rw-r--r--src/cpu/inorder/resources/use_def.hh3
3 files changed, 9 insertions, 19 deletions
diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index 8ea320b6b..ca1f4ade4 100644
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -99,18 +99,6 @@ ExecutionUnit::execute(int slot_num)
return;
}
-
- //@todo: may want to make a separate schedule entry for setting
- // destination register dependencies
- //@note: typically want to set the output dependencies right
- // before we do any reading or writing of registers
- // (in RegFile Manager(use_def.cc)) but there are some
- // instructions that dont have src regs, so just in case
- // take care of reg. dep. map stuff here
- if (!inst->isRegDepEntry()) {
- regDepMap[tid]->insert(inst);
- }
-
switch (exec_req->cmd)
{
case ExecuteInst:
diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index 642998021..a66b64bfc 100644
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -172,12 +172,6 @@ UseDefUnit::execute(int slot_idx)
*nonSpecSeqNum[tid] = seq_num;
}
- //@todo: may want to make a separate schedule entry for setting
- // destination register dependencies
- if (!inst->isRegDepEntry()) {
- regDepMap[tid]->insert(inst);
- }
-
switch (ud_req->cmd)
{
case ReadSrcReg:
@@ -446,6 +440,13 @@ UseDefUnit::execute(int slot_idx)
}
break;
+ case MarkDestRegs:
+ {
+ regDepMap[tid]->insert(inst);
+ ud_req->done();
+ }
+ break;
+
default:
fatal("Unrecognized command to %s", resName);
}
diff --git a/src/cpu/inorder/resources/use_def.hh b/src/cpu/inorder/resources/use_def.hh
index 4c3eceef8..7e2a77469 100644
--- a/src/cpu/inorder/resources/use_def.hh
+++ b/src/cpu/inorder/resources/use_def.hh
@@ -50,7 +50,8 @@ class UseDefUnit : public Resource {
enum Command {
ReadSrcReg,
- WriteDestReg
+ WriteDestReg,
+ MarkDestRegs
};
public: