diff options
Diffstat (limited to 'src/cpu/inorder/thread_context.hh')
| -rw-r--r-- | src/cpu/inorder/thread_context.hh | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh index f4847d0b4..5e1c65f8f 100644 --- a/src/cpu/inorder/thread_context.hh +++ b/src/cpu/inorder/thread_context.hh @@ -1,5 +1,6 @@ /* * Copyright (c) 2012 ARM Limited + * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved * * The license below extends only to copyright in the software and shall @@ -207,6 +208,8 @@ class InOrderThreadContext : public ThreadContext FloatRegBits readFloatRegBits(int reg_idx); + CCReg readCCReg(int reg_idx); + uint64_t readRegOtherThread(int misc_reg, ThreadID tid); /** Sets an integer register to a value. */ @@ -216,6 +219,8 @@ class InOrderThreadContext : public ThreadContext void setFloatRegBits(int reg_idx, FloatRegBits val); + void setCCReg(int reg_idx, CCReg val); + void setRegOtherThread(int misc_reg, const MiscReg &val, ThreadID tid); @@ -265,6 +270,9 @@ class InOrderThreadContext : public ThreadContext int flattenFloatIndex(int reg) { return cpu->isa[thread->threadId()]->flattenFloatIndex(reg); } + int flattenCCIndex(int reg) + { return cpu->isa[thread->threadId()]->flattenCCIndex(reg); } + void activateContext(Cycles delay) { cpu->activateContext(thread->threadId(), delay); } @@ -307,6 +315,9 @@ class InOrderThreadContext : public ThreadContext FloatRegBits readFloatRegBitsFlat(int idx); void setFloatRegBitsFlat(int idx, FloatRegBits val); + + CCReg readCCRegFlat(int idx); + void setCCRegFlat(int idx, CCReg val); }; #endif |