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-rw-r--r--src/cpu/inorder/cpu.cc138
-rw-r--r--src/cpu/inorder/cpu.hh9
-rw-r--r--src/cpu/inorder/inorder_cpu_builder.cc20
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.cc16
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.hh4
-rw-r--r--src/cpu/inorder/params.hh2
-rw-r--r--src/cpu/inorder/resources/cache_unit.cc2
-rw-r--r--src/cpu/inorder/resources/cache_unit.hh3
-rw-r--r--src/cpu/inorder/resources/execution_unit.cc15
-rw-r--r--src/cpu/inorder/thread_context.cc20
-rw-r--r--src/cpu/inorder/thread_context.hh6
-rw-r--r--src/cpu/inorder/thread_state.cc3
-rw-r--r--src/cpu/inorder/thread_state.hh23
13 files changed, 99 insertions, 162 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 9614a5df2..5a14e92a7 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -33,7 +33,6 @@
#include "arch/utility.hh"
#include "base/bigint.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/inorder/resources/resource_list.hh"
#include "cpu/inorder/cpu.hh"
@@ -46,21 +45,20 @@
#include "cpu/activity.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
+#include "cpu/quiesce_event.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
#include "debug/Activity.hh"
#include "debug/InOrderCPU.hh"
+#include "debug/Interrupt.hh"
#include "debug/RefCount.hh"
#include "debug/SkedCache.hh"
#include "debug/Quiesce.hh"
#include "params/InOrderCPU.hh"
+#include "sim/full_system.hh"
#include "sim/process.hh"
#include "sim/stat_control.hh"
-
-#if FULL_SYSTEM
-#include "cpu/quiesce_event.hh"
#include "sim/system.hh"
-#endif
#if THE_ISA == ALPHA_ISA
#include "arch/alpha/osfpal.hh"
@@ -152,12 +150,11 @@ InOrderCPU::CPUEvent::process()
cpu->trapPending[tid] = false;
break;
-#if !FULL_SYSTEM
case Syscall:
cpu->syscall(inst->syscallNum, tid);
cpu->resPool->trap(fault, tid, inst);
break;
-#endif
+
default:
fatal("Unrecognized Event Type %s", eventNames[cpuEventType]);
}
@@ -197,9 +194,7 @@ InOrderCPU::InOrderCPU(Params *params)
timeBuffer(2 , 2),
removeInstsThisCycle(false),
activityRec(params->name, NumStages, 10, params->activity),
-#if FULL_SYSTEM
system(params->system),
-#endif // FULL_SYSTEM
#ifdef DEBUG
cpuEventNum(0),
resReqCount(0),
@@ -217,33 +212,33 @@ InOrderCPU::InOrderCPU(Params *params)
// Resize for Multithreading CPUs
thread.resize(numThreads);
-#if !FULL_SYSTEM
ThreadID active_threads = params->workload.size();
+ if (FullSystem) {
+ active_threads = 1;
+ } else {
+ active_threads = params->workload.size();
- if (active_threads > MaxThreads) {
- panic("Workload Size too large. Increase the 'MaxThreads'"
- "in your InOrder implementation or "
- "edit your workload size.");
- }
+ if (active_threads > MaxThreads) {
+ panic("Workload Size too large. Increase the 'MaxThreads'"
+ "in your InOrder implementation or "
+ "edit your workload size.");
+ }
-
- if (active_threads > 1) {
- threadModel = (InOrderCPU::ThreadModel) params->threadModel;
-
- if (threadModel == SMT) {
- DPRINTF(InOrderCPU, "Setting Thread Model to SMT.\n");
- } else if (threadModel == SwitchOnCacheMiss) {
- DPRINTF(InOrderCPU, "Setting Thread Model to "
- "Switch On Cache Miss\n");
+
+ if (active_threads > 1) {
+ threadModel = (InOrderCPU::ThreadModel) params->threadModel;
+
+ if (threadModel == SMT) {
+ DPRINTF(InOrderCPU, "Setting Thread Model to SMT.\n");
+ } else if (threadModel == SwitchOnCacheMiss) {
+ DPRINTF(InOrderCPU, "Setting Thread Model to "
+ "Switch On Cache Miss\n");
+ }
+
+ } else {
+ threadModel = Single;
}
-
- } else {
- threadModel = Single;
}
-
-
-
-#endif
// Bind the fetch & data ports from the resource pool.
fetchPortIdx = resPool->getPortIdx(params->fetchMemPort);
@@ -260,36 +255,34 @@ InOrderCPU::InOrderCPU(Params *params)
pc[tid].set(0);
lastCommittedPC[tid].set(0);
-#if FULL_SYSTEM
- // SMT is not supported in FS mode yet.
- assert(numThreads == 1);
- thread[tid] = new Thread(this, 0);
-#else
- if (tid < (ThreadID)params->workload.size()) {
- DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n",
- tid, params->workload[tid]->prog_fname);
- thread[tid] =
- new Thread(this, tid, params->workload[tid]);
+ if (FullSystem) {
+ // SMT is not supported in FS mode yet.
+ assert(numThreads == 1);
+ thread[tid] = new Thread(this, 0, NULL);
} else {
- //Allocate Empty thread so M5 can use later
- //when scheduling threads to CPU
- Process* dummy_proc = params->workload[0];
- thread[tid] = new Thread(this, tid, dummy_proc);
+ if (tid < (ThreadID)params->workload.size()) {
+ DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n",
+ tid, params->workload[tid]->prog_fname);
+ thread[tid] =
+ new Thread(this, tid, params->workload[tid]);
+ } else {
+ //Allocate Empty thread so M5 can use later
+ //when scheduling threads to CPU
+ Process* dummy_proc = params->workload[0];
+ thread[tid] = new Thread(this, tid, dummy_proc);
+ }
+
+ // Eventually set this with parameters...
+ asid[tid] = tid;
}
-
- // Eventually set this with parameters...
- asid[tid] = tid;
-#endif
// Setup the TC that will serve as the interface to the threads/CPU.
InOrderThreadContext *tc = new InOrderThreadContext;
tc->cpu = this;
tc->thread = thread[tid];
-#if FULL_SYSTEM
// Setup quiesce event.
this->thread[tid]->quiesceEvent = new EndQuiesceEvent(tc);
-#endif
// Give the thread the TC.
thread[tid]->tc = tc;
@@ -348,16 +341,17 @@ InOrderCPU::InOrderCPU(Params *params)
dummyReq[tid] = new ResourceRequest(resPool->getResource(0));
-#if FULL_SYSTEM
- // Use this dummy inst to force squashing behind every instruction
- // in pipeline
- dummyTrapInst[tid] = new InOrderDynInst(this, NULL, 0, 0, 0);
- dummyTrapInst[tid]->seqNum = 0;
- dummyTrapInst[tid]->squashSeqNum = 0;
- dummyTrapInst[tid]->setTid(tid);
-#endif
- trapPending[tid] = false;
+ if (FullSystem) {
+ // Use this dummy inst to force squashing behind every instruction
+ // in pipeline
+ dummyTrapInst[tid] = new InOrderDynInst(this, NULL, 0, 0, 0);
+ dummyTrapInst[tid]->seqNum = 0;
+ dummyTrapInst[tid]->squashSeqNum = 0;
+ dummyTrapInst[tid]->setTid(tid);
+ }
+
+ trapPending[tid] = false;
}
@@ -698,9 +692,7 @@ InOrderCPU::tick()
++numCycles;
-#if FULL_SYSTEM
checkForInterrupts();
-#endif
bool pipes_idle = true;
//Tick each of the stages
@@ -761,14 +753,14 @@ InOrderCPU::init()
for (ThreadID tid = 0; tid < numThreads; ++tid)
thread[tid]->inSyscall = true;
-#if FULL_SYSTEM
- for (ThreadID tid = 0; tid < numThreads; tid++) {
- ThreadContext *src_tc = threadContexts[tid];
- TheISA::initCPU(src_tc, src_tc->contextId());
- // Initialise the ThreadContext's memory proxies
- thread[tid]->initMemProxies(thread[tid]->getTC());
+ if (FullSystem) {
+ for (ThreadID tid = 0; tid < numThreads; tid++) {
+ ThreadContext *src_tc = threadContexts[tid];
+ TheISA::initCPU(src_tc, src_tc->contextId());
+ // Initialise the ThreadContext's memory proxies
+ thread[tid]->initMemProxies(thread[tid]->getTC());
+ }
}
-#endif
// Clear inSyscall.
for (ThreadID tid = 0; tid < numThreads; ++tid)
@@ -784,7 +776,6 @@ InOrderCPU::getPort(const std::string &if_name, int idx)
return resPool->getPort(if_name, idx);
}
-#if FULL_SYSTEM
Fault
InOrderCPU::hwrei(ThreadID tid)
{
@@ -870,7 +861,6 @@ InOrderCPU::getInterrupts()
return interrupts->getInterrupt(threadContexts[0]);
}
-
void
InOrderCPU::processInterrupts(Fault interrupt)
{
@@ -889,8 +879,6 @@ InOrderCPU::processInterrupts(Fault interrupt)
trap(interrupt, threadContexts[0]->contextId(), dummyBufferInst);
}
-#endif
-
void
InOrderCPU::trapContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay)
{
@@ -1681,7 +1669,6 @@ InOrderCPU::wakeCPU()
schedule(&tickEvent, nextCycle(curTick()));
}
-#if FULL_SYSTEM
// Lots of copied full system code...place into BaseCPU class?
void
InOrderCPU::wakeup()
@@ -1694,9 +1681,7 @@ InOrderCPU::wakeup()
DPRINTF(Quiesce, "Suspended Processor woken\n");
threadContexts[0]->activate();
}
-#endif
-#if !FULL_SYSTEM
void
InOrderCPU::syscallContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay)
{
@@ -1734,7 +1719,6 @@ InOrderCPU::syscall(int64_t callnum, ThreadID tid)
// Clear Non-Speculative Block Variable
nonSpecInstActive[tid] = false;
}
-#endif
TheISA::TLB*
InOrderCPU::getITBPtr()
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index 1559874cd..7d22bc902 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -43,7 +43,6 @@
#include "arch/types.hh"
#include "base/statistics.hh"
#include "base/types.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_stage.hh"
@@ -413,7 +412,6 @@ class InOrderCPU : public BaseCPU
/** Get a Memory Port */
Port* getPort(const std::string &if_name, int idx = 0);
-#if FULL_SYSTEM
/** HW return from error interrupt. */
Fault hwrei(ThreadID tid);
@@ -435,14 +433,13 @@ class InOrderCPU : public BaseCPU
/** Check if this address is a valid data address. */
bool validDataAddr(Addr addr) { return true; }
-#else
+
/** Schedule a syscall on the CPU */
void syscallContext(Fault fault, ThreadID tid, DynInstPtr inst,
int delay = 0);
/** Executes a syscall.*/
void syscall(int64_t callnum, ThreadID tid);
-#endif
/** Schedule a trap on the CPU */
void trapContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay = 0);
@@ -749,9 +746,7 @@ class InOrderCPU : public BaseCPU
/** Wakes the CPU, rescheduling the CPU if it's not already active. */
void wakeCPU();
-#if FULL_SYSTEM
virtual void wakeup();
-#endif
/* LL/SC debug functionality
unsigned stCondFails;
@@ -780,10 +775,8 @@ class InOrderCPU : public BaseCPU
return total;
}
-#if FULL_SYSTEM
/** Pointer to the system. */
System *system;
-#endif
/** The global sequence number counter. */
InstSeqNum globalSeqNum[ThePipeline::MaxThreads];
diff --git a/src/cpu/inorder/inorder_cpu_builder.cc b/src/cpu/inorder/inorder_cpu_builder.cc
index 99729577e..bde5b1e94 100644
--- a/src/cpu/inorder/inorder_cpu_builder.cc
+++ b/src/cpu/inorder/inorder_cpu_builder.cc
@@ -38,21 +38,23 @@
#include "cpu/inst_seq.hh"
#include "cpu/static_inst.hh"
#include "params/InOrderCPU.hh"
+#include "sim/full_system.hh"
InOrderCPU *
InOrderCPUParams::create()
{
-#if FULL_SYSTEM
- // Full-system only supports a single thread for the moment.
- ThreadID actual_num_threads = 1;
-#else
- ThreadID actual_num_threads =
- (numThreads >= workload.size()) ? numThreads : workload.size();
+ ThreadID actual_num_threads;
+ if (FullSystem) {
+ // Full-system only supports a single thread for the moment.
+ actual_num_threads = 1;
+ } else {
+ actual_num_threads =
+ (numThreads >= workload.size()) ? numThreads : workload.size();
- if (workload.size() == 0) {
- fatal("Must specify at least one workload!");
+ if (workload.size() == 0) {
+ fatal("Must specify at least one workload!");
+ }
}
-#endif
numThreads = actual_num_threads;
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index ff178f6d3..043b21134 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -45,6 +45,7 @@
#include "cpu/exetrace.hh"
#include "debug/InOrderDynInst.hh"
#include "mem/request.hh"
+#include "sim/full_system.hh"
using namespace std;
using namespace TheISA;
@@ -269,8 +270,6 @@ InOrderDynInst::memAccess()
}
-#if FULL_SYSTEM
-
Fault
InOrderDynInst::hwrei()
{
@@ -311,17 +310,16 @@ InOrderDynInst::simPalCheck(int palFunc)
#endif
return this->cpu->simPalCheck(palFunc, this->threadNumber);
}
-#endif
void
InOrderDynInst::syscall(int64_t callnum)
{
-#if FULL_SYSTEM
- panic("Syscall emulation isn't available in FS mode.\n");
-#else
- syscallNum = callnum;
- cpu->syscallContext(NoFault, this->threadNumber, this);
-#endif
+ if (FullSystem) {
+ panic("Syscall emulation isn't available in FS mode.\n");
+ } else {
+ syscallNum = callnum;
+ cpu->syscallContext(NoFault, this->threadNumber, this);
+ }
}
void
diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh
index f49476ec5..b49dd7594 100644
--- a/src/cpu/inorder/inorder_dyn_inst.hh
+++ b/src/cpu/inorder/inorder_dyn_inst.hh
@@ -45,7 +45,6 @@
#include "base/fast_alloc.hh"
#include "base/trace.hh"
#include "base/types.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/inorder/inorder_trace.hh"
#include "cpu/inorder/pipeline_traits.hh"
@@ -517,15 +516,12 @@ class InOrderDynInst : public FastAlloc, public RefCounted
void setCurResSlot(unsigned slot_num) { curResSlot = slot_num; }
/** Calls a syscall. */
-#if FULL_SYSTEM
/** Calls hardware return from error interrupt. */
Fault hwrei();
/** Traps to handle specified fault. */
void trap(Fault fault);
bool simPalCheck(int palFunc);
-#else
short syscallNum;
-#endif
/** Emulates a syscall. */
void syscall(int64_t callnum);
diff --git a/src/cpu/inorder/params.hh b/src/cpu/inorder/params.hh
index 51b7409ad..44f2a5018 100644
--- a/src/cpu/inorder/params.hh
+++ b/src/cpu/inorder/params.hh
@@ -50,10 +50,8 @@ class InOrderParams : public BaseCPU::Params
public:
// Workloads
-#if !FULL_SYSTEM
std::vector<Process *> workload;
Process *process;
-#endif // FULL_SYSTEM
//
// Memory System/Caches
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index 856675e05..0ab9f0579 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -430,13 +430,11 @@ CacheUnit::doTLBAccess(DynInstPtr inst, CacheReqPtr cache_req, int acc_size,
}
}
-#if !FULL_SYSTEM
void
CacheUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst)
{
tlbBlocked[tid] = false;
}
-#endif
Fault
CacheUnit::read(DynInstPtr inst, Addr addr,
diff --git a/src/cpu/inorder/resources/cache_unit.hh b/src/cpu/inorder/resources/cache_unit.hh
index 6ca300163..2155c920c 100644
--- a/src/cpu/inorder/resources/cache_unit.hh
+++ b/src/cpu/inorder/resources/cache_unit.hh
@@ -149,9 +149,8 @@ class CacheUnit : public Resource
bool processSquash(CacheReqPacket *cache_pkt);
-#if !FULL_SYSTEM
void trap(Fault fault, ThreadID tid, DynInstPtr inst);
-#endif
+
void recvRetry();
/** Returns a specific port. */
diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index a0a486269..16f737308 100644
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -38,6 +38,7 @@
#include "debug/Fault.hh"
#include "debug/InOrderExecute.hh"
#include "debug/InOrderStall.hh"
+#include "sim/full_system.hh"
using namespace std;
using namespace ThePipeline;
@@ -219,14 +220,14 @@ ExecutionUnit::execute(int slot_num)
seq_num, didx, inst->readIntResult(didx));
#endif
-#if !FULL_SYSTEM
- // The Syscall might change the PC, so conservatively
- // squash everything behing it
- if (inst->isSyscall()) {
- inst->setSquashInfo(stage_num);
- setupSquash(inst, stage_num, tid);
+ if (!FullSystem) {
+ // The Syscall might change the PC, so conservatively
+ // squash everything behing it
+ if (inst->isSyscall()) {
+ inst->setSquashInfo(stage_num);
+ setupSquash(inst, stage_num, tid);
+ }
}
-#endif
} else {
DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i]: had a %s "
"fault.\n", inst->readTid(), seq_num, fault->name());
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc
index 82e681f04..acfcf0939 100644
--- a/src/cpu/inorder/thread_context.cc
+++ b/src/cpu/inorder/thread_context.cc
@@ -34,18 +34,16 @@
#include "cpu/inorder/thread_context.hh"
#include "cpu/exetrace.hh"
#include "debug/InOrderCPU.hh"
+#include "sim/full_system.hh"
using namespace TheISA;
-#if FULL_SYSTEM
-
FSTranslatingPortProxy*
InOrderThreadContext::getVirtProxy()
{
return thread->getVirtProxy();
}
-
void
InOrderThreadContext::dumpFuncProfile()
{
@@ -79,26 +77,19 @@ InOrderThreadContext::profileSample()
{
thread->profileSample();
}
-#endif
void
InOrderThreadContext::takeOverFrom(ThreadContext *old_context)
{
// some things should already be set up
assert(getSystemPtr() == old_context->getSystemPtr());
-#if !FULL_SYSTEM
assert(getProcessPtr() == old_context->getProcessPtr());
-#endif
-
-
// copy over functional state
setStatus(old_context->status());
copyArchRegs(old_context);
-#if !FULL_SYSTEM
thread->funcExeInst = old_context->readFuncExeInst();
-#endif
old_context->setStatus(ThreadContext::Halted);
@@ -151,11 +142,10 @@ InOrderThreadContext::halt(int delay)
void
InOrderThreadContext::regStats(const std::string &name)
{
-#if FULL_SYSTEM
- thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system);
- thread->kernelStats->regStats(name + ".kern");
-#endif
- ;
+ if (FullSystem) {
+ thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system);
+ thread->kernelStats->regStats(name + ".kern");
+ }
}
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 5b67d7e8b..7fe0fb5ef 100644
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -109,7 +109,6 @@ class InOrderThreadContext : public ThreadContext
void setNextMicroPC(uint64_t val) { };
-#if FULL_SYSTEM
/** Returns a pointer to physical memory. */
PhysicalMemory *getPhysMemPtr()
{ assert(0); return 0; /*return cpu->physmem;*/ }
@@ -146,12 +145,11 @@ class InOrderThreadContext : public ThreadContext
{
return this->thread->quiesceEvent;
}
-#else
+
SETranslatingPortProxy* getMemProxy() { return thread->getMemProxy(); }
/** Returns a pointer to this thread's process. */
Process *getProcessPtr() { return thread->getProcessPtr(); }
-#endif
/** Returns this thread's status. */
Status status() const { return thread->status(); }
@@ -273,11 +271,9 @@ class InOrderThreadContext : public ThreadContext
* misspeculating, this is set as false. */
bool misspeculating() { return false; }
-#if !FULL_SYSTEM
/** Executes a syscall in SE mode. */
void syscall(int64_t callnum)
{ return cpu->syscall(callnum, thread->threadId()); }
-#endif
/** Reads the funcExeInst counter. */
Counter readFuncExeInst() { return thread->funcExeInst; }
diff --git a/src/cpu/inorder/thread_state.cc b/src/cpu/inorder/thread_state.cc
index b17f05c7d..040e29283 100644
--- a/src/cpu/inorder/thread_state.cc
+++ b/src/cpu/inorder/thread_state.cc
@@ -36,12 +36,9 @@
using namespace TheISA;
-#if FULL_SYSTEM
void
InOrderThreadState::dumpFuncProfile()
{
std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
profile->dump(tc, *os);
}
-#endif
-
diff --git a/src/cpu/inorder/thread_state.hh b/src/cpu/inorder/thread_state.hh
index 227097569..1ffc59f65 100644
--- a/src/cpu/inorder/thread_state.hh
+++ b/src/cpu/inorder/thread_state.hh
@@ -39,17 +39,13 @@
#include "cpu/thread_state.hh"
#include "sim/sim_exit.hh"
-class Event;
-class InOrderCPU;
-
-#if FULL_SYSTEM
class EndQuiesceEvent;
-class FunctionProfile;
-class ProfileNode;
-#else
+class Event;
class FunctionalMemory;
+class FunctionProfile;
+class InOrderCPU;
class Process;
-#endif
+class ProfileNode;
/**
* Class that has various thread state, such as the status, the
@@ -76,28 +72,17 @@ class InOrderThreadState : public ThreadState {
*/
bool trapPending;
-#if FULL_SYSTEM
- InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num)
- : ThreadState(reinterpret_cast<BaseCPU*>(_cpu), _thread_num),
- cpu(_cpu), inSyscall(0), trapPending(0), lastGradIsBranch(false)
- { }
-#else
InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num,
Process *_process)
: ThreadState(reinterpret_cast<BaseCPU*>(_cpu), _thread_num,
_process),
cpu(_cpu), inSyscall(0), trapPending(0), lastGradIsBranch(false)
{ }
-#endif
-#if !FULL_SYSTEM
/** Handles the syscall. */
void syscall(int64_t callnum) { process->syscall(callnum, tc); }
-#endif
-#if FULL_SYSTEM
void dumpFuncProfile();
-#endif
/** Pointer to the ThreadContext of this thread. */
ThreadContext *tc;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 18:28:13 +0000