diff options
Diffstat (limited to 'src/cpu/inorder')
-rw-r--r-- | src/cpu/inorder/thread_context.cc | 55 | ||||
-rw-r--r-- | src/cpu/inorder/thread_context.hh | 21 |
2 files changed, 76 insertions, 0 deletions
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc index 6b3375a52..4abfb6cca 100644 --- a/src/cpu/inorder/thread_context.cc +++ b/src/cpu/inorder/thread_context.cc @@ -1,4 +1,16 @@ /* + * Copyright (c) 2012 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2007 MIPS Technologies, Inc. * All rights reserved. * @@ -249,3 +261,46 @@ InOrderThreadContext::setMiscReg(int misc_reg, const MiscReg &val) { cpu->setMiscReg(misc_reg, val, thread->threadId()); } + + +uint64_t +InOrderThreadContext::readIntRegFlat(int idx) +{ + const ThreadID tid = thread->threadId(); + return cpu->readIntReg(idx, tid); +} + +void +InOrderThreadContext::setIntRegFlat(int idx, uint64_t val) +{ + const ThreadID tid = thread->threadId(); + cpu->setIntReg(idx, val, tid); +} + +FloatReg +InOrderThreadContext::readFloatRegFlat(int idx) +{ + const ThreadID tid = thread->threadId(); + return cpu->readFloatReg(idx, tid); +} + +void +InOrderThreadContext::setFloatRegFlat(int idx, FloatReg val) +{ + const ThreadID tid = thread->threadId(); + cpu->setFloatReg(idx, val, tid); +} + +FloatRegBits +InOrderThreadContext::readFloatRegBitsFlat(int idx) +{ + const ThreadID tid = thread->threadId(); + return cpu->readFloatRegBits(idx, tid); +} + +void +InOrderThreadContext::setFloatRegBitsFlat(int idx, FloatRegBits val) +{ + const ThreadID tid = thread->threadId(); + cpu->setFloatRegBits(idx, val, tid); +} diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh index a959d71d6..2191ac238 100644 --- a/src/cpu/inorder/thread_context.hh +++ b/src/cpu/inorder/thread_context.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2012 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2007 MIPS Technologies, Inc. * All rights reserved. * @@ -292,6 +304,15 @@ class InOrderThreadContext : public ThreadContext void changeRegFileContext(unsigned param, unsigned val) { panic("Not supported!"); } + + uint64_t readIntRegFlat(int idx); + void setIntRegFlat(int idx, uint64_t val); + + FloatReg readFloatRegFlat(int idx); + void setFloatRegFlat(int idx, FloatReg val); + + FloatRegBits readFloatRegBitsFlat(int idx); + void setFloatRegBitsFlat(int idx, FloatRegBits val); }; #endif |